Fix VerificClocking for cases where Verific generates chains of PRIM_SVA_POSEDGE

Signed-off-by: Clifford Wolf <clifford@clifford.at>

diff --git a/frontends/verific/verific.cc b/frontends/verific/verific.cc
index 7ebcbca0481711002e869cc674e6b89397371f29..19273c69ad5467964e0b194dfa735015e464ab45 100644 (file)
--- a/frontends/verific/verific.cc
+++ b/frontends/verific/verific.cc
@@ -1393,7 +1393,7 @@ VerificClocking::VerificClocking(VerificImporter *importer, Net *net, bool sva_a
                        return;
        }
 
-       if (inst != nullptr && inst->Type() == PRIM_SVA_POSEDGE)
+       while (inst != nullptr && inst->Type() == PRIM_SVA_POSEDGE)
        {
                net = inst->GetInput();
                inst = net->Driver();;