2015-02-04 Alan Lawrence <alan.lawrence@arm.com>
Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
* gcc.dg/combine_ashiftrt_1.c: Sort, complete and explain target
list, allow for multilibed targets.
* gcc.dg/combine_ashiftrt_2.c: Likewise.
Co-Authored-By: Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
From-SVN: r220397
+2015-02-04 Alan Lawrence <alan.lawrence@arm.com>
+ Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
+
+ * gcc.dg/combine_ashiftrt_1.c: Sort, complete and explain target
+ list, allow for multilibed targets.
+ * gcc.dg/combine_ashiftrt_2.c: Likewise.
+
2015-02-04 Segher Boessenkool <segher@kernel.crashing.org>
* gcc.dg/builtins-58.c: Check for pow at the end of words only.
-/* { dg-do compile {target sparc64*-*-* aarch64*-*-* i?86-*-* x86_64-*-* powerpc64*-*-*} } */
+/* Target architectures which have been found to produce the expected RTL
+ (neg:DI (ge:DI ...)) when compiling for LP64. */
+/* { dg-do compile { target aarch64*-*-* arm*-*-* i?86-*-* ia64-*-* powerpc*-*-* sparc*-*-* x86_64-*-* } } */
/* { dg-require-effective-target lp64 } */
/* { dg-options "-O2 -fdump-rtl-combine-all" } */
-/* { dg-do compile {target arm*-*-* i?86-*-* x86_64-*-* powerpc-*-* sparc-*-*} } */
+/* Target architectures where RTL has been found to produce the expected
+ (neg:SI (ge:SI ...)) when compiling for ILP32. */
+/* { dg-do compile { target aarch64*-*-* arm*-*-* i?86-*-* microblaze-*-* mips*-*-* powerpc*-*-* sparc*-*-* x86_64-*-* } } */
/* { dg-require-effective-target ilp32 } */
/* { dg-options "-O2 -fdump-rtl-combine-all" } */