rs6000: Use memory_operand for all simple {l,st}*brx instructions

We run fwprop before combine, very early even in the case of fwprop1;
and fwprop1 will change memory addressing to what it considers cheaper.
After the "common" change, it now changes the indexed store instruction
in the testcase to be to a constant address.  But that is not an
improvement at all: the byte reverse instructions only exist in the
indexed form, so they will not match anymore.

This patch changes the patterns for the byte reverse instructions to
allow plain memory_operand, letting reload fix this up.

	PR target/92602
	* config/rs6000/rs6000.md (bswap<mode>2_load for HSI): Change the
	indexed_or_indirect_operand to be memory_operand.
	(bswap<mode>2_store for HSI): Ditto.
	(bswapdi2_load): Ditto.
	(bswapdi2_store): Ditto.

From-SVN: r278821

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index da4f52d5f33b3742445ce88dff9378c9676e863f..3c8f8d3346e974b9aaec695333da6ea971ed01d1 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,12 @@
+2019-11-28  Segher Boessenkool  <segher@kernel.crashing.org>
+
+       PR target/92602
+       * config/rs6000/rs6000.md (bswap<mode>2_load for HSI): Change the
+       indexed_or_indirect_operand to be memory_operand.
+       (bswap<mode>2_store for HSI): Ditto.
+       (bswapdi2_load): Ditto.
+       (bswapdi2_store): Ditto.
+
 2019-11-28  Martin Liska  <mliska@suse.cz>
 
        PR debug/46558

diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 876dfe3e9598f8e6e3873c9a7697168a5bad4e26..0187ba0a1a33cd73cc6b945a3012bd51297e0d6b 100644 (file)
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -2510,13 +2510,13 @@
 
 (define_insn "bswap<mode>2_load"
   [(set (match_operand:HSI 0 "gpc_reg_operand" "=r")
-       (bswap:HSI (match_operand:HSI 1 "indexed_or_indirect_operand" "Z")))]
+       (bswap:HSI (match_operand:HSI 1 "memory_operand" "Z")))]
   ""
   "l<wd>brx %0,%y1"
   [(set_attr "type" "load")])
 
 (define_insn "bswap<mode>2_store"
-  [(set (match_operand:HSI 0 "indexed_or_indirect_operand" "=Z")
+  [(set (match_operand:HSI 0 "memory_operand" "=Z")
        (bswap:HSI (match_operand:HSI 1 "gpc_reg_operand" "r")))]
   ""
   "st<wd>brx %1,%y0"
@@ -2632,13 +2632,13 @@
 ;; Power7/cell has ldbrx/stdbrx, so use it directly
 (define_insn "bswapdi2_load"
   [(set (match_operand:DI 0 "gpc_reg_operand" "=r")
-       (bswap:DI (match_operand:DI 1 "indexed_or_indirect_operand" "Z")))]
+       (bswap:DI (match_operand:DI 1 "memory_operand" "Z")))]
   "TARGET_POWERPC64 && TARGET_LDBRX"
   "ldbrx %0,%y1"
   [(set_attr "type" "load")])
 
 (define_insn "bswapdi2_store"
-  [(set (match_operand:DI 0 "indexed_or_indirect_operand" "=Z")
+  [(set (match_operand:DI 0 "memory_operand" "=Z")
        (bswap:DI (match_operand:DI 1 "gpc_reg_operand" "r")))]
   "TARGET_POWERPC64 && TARGET_LDBRX"
   "stdbrx %1,%y0"