nv50: add depth texture formats, and a few others, too

diff --git a/src/gallium/drivers/nv50/nv50_screen.c b/src/gallium/drivers/nv50/nv50_screen.c
index 63dce0f4c22884e059aad4cb9e71873e96360abf..c672ea471a396c50230df4613f6de3ca9d8454b5 100644 (file)
--- a/src/gallium/drivers/nv50/nv50_screen.c
+++ b/src/gallium/drivers/nv50/nv50_screen.c
@@ -38,6 +38,11 @@ nv50_screen_is_format_supported(struct pipe_screen *pscreen,
                case PIPE_FORMAT_X8R8G8B8_UNORM:
                case PIPE_FORMAT_A8R8G8B8_UNORM:
                case PIPE_FORMAT_R5G6B5_UNORM:
+               case PIPE_FORMAT_R16G16B16A16_SNORM:
+               case PIPE_FORMAT_R16G16B16A16_UNORM:
+               case PIPE_FORMAT_R32G32B32A32_FLOAT:
+               case PIPE_FORMAT_R16G16_SNORM:
+               case PIPE_FORMAT_R16G16_UNORM:
                        return TRUE;
                default:
                        break;
@@ -57,6 +62,8 @@ nv50_screen_is_format_supported(struct pipe_screen *pscreen,
                switch (format) {
                case PIPE_FORMAT_A8R8G8B8_UNORM:
                case PIPE_FORMAT_X8R8G8B8_UNORM:
+               case PIPE_FORMAT_A8R8G8B8_SRGB:
+               case PIPE_FORMAT_X8R8G8B8_SRGB:
                case PIPE_FORMAT_A1R5G5B5_UNORM:
                case PIPE_FORMAT_A4R4G4B4_UNORM:
                case PIPE_FORMAT_R5G6B5_UNORM:
@@ -68,6 +75,13 @@ nv50_screen_is_format_supported(struct pipe_screen *pscreen,
                case PIPE_FORMAT_DXT1_RGBA:
                case PIPE_FORMAT_DXT3_RGBA:
                case PIPE_FORMAT_DXT5_RGBA:
+               case PIPE_FORMAT_Z24S8_UNORM:
+               case PIPE_FORMAT_Z32_FLOAT:
+               case PIPE_FORMAT_R16G16B16A16_SNORM:
+               case PIPE_FORMAT_R16G16B16A16_UNORM:
+               case PIPE_FORMAT_R32G32B32A32_FLOAT:
+               case PIPE_FORMAT_R16G16_SNORM:
+               case PIPE_FORMAT_R16G16_UNORM:
                        return TRUE;
                default:
                        break;

diff --git a/src/gallium/drivers/nv50/nv50_state_validate.c b/src/gallium/drivers/nv50/nv50_state_validate.c
index 012911f41bd437e57271b3589ce7b86945ea79fc..956a70061541429f19b3ed4c3af155c210987a2c 100644 (file)
--- a/src/gallium/drivers/nv50/nv50_state_validate.c
+++ b/src/gallium/drivers/nv50/nv50_state_validate.c
@@ -23,6 +23,12 @@
 #include "nv50_context.h"
 #include "nouveau/nouveau_stateobj.h"
 
+#define NV50_CBUF_FORMAT_CASE(n) \
+       case PIPE_FORMAT_##n: so_data(so, NV50TCL_RT_FORMAT_##n); break
+
+#define NV50_ZETA_FORMAT_CASE(n) \
+       case PIPE_FORMAT_##n: so_data(so, NV50TCL_ZETA_FORMAT_##n); break
+
 static void
 nv50_state_validate_fb(struct nv50_context *nv50)
 {
@@ -54,15 +60,14 @@ nv50_state_validate_fb(struct nv50_context *nv50)
                so_reloc (so, bo, fb->cbufs[i]->offset, NOUVEAU_BO_VRAM |
                              NOUVEAU_BO_LOW | NOUVEAU_BO_RDWR, 0, 0);
                switch (fb->cbufs[i]->format) {
-               case PIPE_FORMAT_A8R8G8B8_UNORM:
-                       so_data(so, NV50TCL_RT_FORMAT_A8R8G8B8_UNORM);
-                       break;
-               case PIPE_FORMAT_X8R8G8B8_UNORM:
-                       so_data(so, NV50TCL_RT_FORMAT_X8R8G8B8_UNORM);
-                       break;
-               case PIPE_FORMAT_R5G6B5_UNORM:
-                       so_data(so, NV50TCL_RT_FORMAT_R5G6B5_UNORM);
-                       break;
+               NV50_CBUF_FORMAT_CASE(A8R8G8B8_UNORM);
+               NV50_CBUF_FORMAT_CASE(X8R8G8B8_UNORM);
+               NV50_CBUF_FORMAT_CASE(R5G6B5_UNORM);
+               NV50_CBUF_FORMAT_CASE(R16G16B16A16_SNORM);
+               NV50_CBUF_FORMAT_CASE(R16G16B16A16_UNORM);
+               NV50_CBUF_FORMAT_CASE(R32G32B32A32_FLOAT);
+               NV50_CBUF_FORMAT_CASE(R16G16_SNORM);
+               NV50_CBUF_FORMAT_CASE(R16G16_UNORM);
                default:
                        NOUVEAU_ERR("AIIII unknown format %s\n",
                                    pf_name(fb->cbufs[i]->format));
@@ -96,18 +101,10 @@ nv50_state_validate_fb(struct nv50_context *nv50)
                so_reloc (so, bo, fb->zsbuf->offset, NOUVEAU_BO_VRAM |
                              NOUVEAU_BO_LOW | NOUVEAU_BO_RDWR, 0, 0);
                switch (fb->zsbuf->format) {
-               case PIPE_FORMAT_Z32_FLOAT:
-                       so_data(so, NV50TCL_ZETA_FORMAT_Z32_FLOAT);
-                       break;
-               case PIPE_FORMAT_Z24S8_UNORM:
-                       so_data(so, NV50TCL_ZETA_FORMAT_Z24S8_UNORM);
-                       break;
-               case PIPE_FORMAT_X8Z24_UNORM:
-                       so_data(so, NV50TCL_ZETA_FORMAT_X8Z24_UNORM);
-                       break;
-               case PIPE_FORMAT_S8Z24_UNORM:
-                       so_data(so, NV50TCL_ZETA_FORMAT_S8Z24_UNORM);
-                       break;
+               NV50_ZETA_FORMAT_CASE(S8Z24_UNORM);
+               NV50_ZETA_FORMAT_CASE(X8Z24_UNORM);
+               NV50_ZETA_FORMAT_CASE(Z24S8_UNORM);
+               NV50_ZETA_FORMAT_CASE(Z32_FLOAT);
                default:
                        NOUVEAU_ERR("AIIII unknown format %s\n",
                                    pf_name(fb->zsbuf->format));

diff --git a/src/gallium/drivers/nv50/nv50_tex.c b/src/gallium/drivers/nv50/nv50_tex.c
index e12a6ad648b2f726a44ec28067ebdddf82ca2f6b..52ccdaa40733c3eb30b176c0ea887be8a76ddbe2 100644 (file)
--- a/src/gallium/drivers/nv50/nv50_tex.c
+++ b/src/gallium/drivers/nv50/nv50_tex.c
@@ -25,16 +25,18 @@
 
 #include "nouveau/nouveau_stateobj.h"
 
-#define _(pf, tt, r, g, b, a, tf)                              \
+#define _MIXED(pf, t0, t1, t2, t3, cr, cg, cb, ca, f)          \
 {                                                              \
        PIPE_FORMAT_##pf,                                       \
-       NV50TIC_0_0_MAPR_##r | NV50TIC_0_0_TYPER_##tt |         \
-       NV50TIC_0_0_MAPG_##g | NV50TIC_0_0_TYPEG_##tt |         \
-       NV50TIC_0_0_MAPB_##b | NV50TIC_0_0_TYPEB_##tt |         \
-       NV50TIC_0_0_MAPA_##a | NV50TIC_0_0_TYPEA_##tt |         \
-       NV50TIC_0_0_FMT_##tf                                    \
+       NV50TIC_0_0_MAPR_##cr | NV50TIC_0_0_TYPER_##t0 |        \
+       NV50TIC_0_0_MAPG_##cg | NV50TIC_0_0_TYPEG_##t1 |        \
+       NV50TIC_0_0_MAPB_##cb | NV50TIC_0_0_TYPEB_##t2 |        \
+       NV50TIC_0_0_MAPA_##ca | NV50TIC_0_0_TYPEA_##t3 |        \
+       NV50TIC_0_0_FMT_##f                                     \
 }
 
+#define _(pf, t, cr, cg, cb, ca, f) _MIXED(pf, t, t, t, t, cr, cg, cb, ca, f)
+
 struct nv50_texture_format {
        enum pipe_format pf;
        uint32_t hw;
@@ -46,7 +48,9 @@ struct nv50_texture_format {
 static const struct nv50_texture_format nv50_tex_format_list[] =
 {
        _(A8R8G8B8_UNORM, UNORM, C2, C1, C0, C3,  8_8_8_8),
+       _(A8R8G8B8_SRGB,  UNORM, C2, C1, C0, C3,  8_8_8_8),
        _(X8R8G8B8_UNORM, UNORM, C2, C1, C0, ONE, 8_8_8_8),
+       _(X8R8G8B8_SRGB,  UNORM, C2, C1, C0, ONE, 8_8_8_8),
        _(A1R5G5B5_UNORM, UNORM, C2, C1, C0, C3,  1_5_5_5),
        _(A4R4G4B4_UNORM, UNORM, C2, C1, C0, C3,  4_4_4_4),
 
@@ -61,16 +65,30 @@ static const struct nv50_texture_format nv50_tex_format_list[] =
        _(DXT1_RGB, UNORM, C0, C1, C2, ONE, DXT1),
        _(DXT1_RGBA, UNORM, C0, C1, C2, C3, DXT1),
        _(DXT3_RGBA, UNORM, C0, C1, C2, C3, DXT3),
-       _(DXT5_RGBA, UNORM, C0, C1, C2, C3, DXT5)
+       _(DXT5_RGBA, UNORM, C0, C1, C2, C3, DXT5),
+
+       _MIXED(Z24S8_UNORM, UINT, UNORM, UINT, UINT, C1, C1, C1, ONE, 24_8),
+
+       _(R16G16B16A16_SNORM, UNORM, C0, C1, C2, C3, 16_16_16_16),
+       _(R16G16B16A16_UNORM, SNORM, C0, C1, C2, C3, 16_16_16_16),
+       _(R32G32B32A32_FLOAT, FLOAT, C0, C1, C2, C3, 32_32_32_32),
+
+       _(R16G16_SNORM, SNORM, C0, C1, ZERO, ONE, 16_16),
+       _(R16G16_UNORM, UNORM, C0, C1, ZERO, ONE, 16_16),
+
+       _MIXED(Z32_FLOAT, FLOAT, UINT, UINT, UINT, C0, C0, C0, ONE, 32_DEPTH)
+
 };
 
 #undef _
+#undef _MIXED
 
 static int
 nv50_tex_construct(struct nv50_context *nv50, struct nouveau_stateobj *so,
                   struct nv50_miptree *mt, int unit)
 {
        unsigned i;
+       uint32_t mode;
 
        for (i = 0; i < NV50_TEX_FORMAT_LIST_SIZE; i++)
                if (nv50_tex_format_list[i].pf == mt->base.base.format)
@@ -78,13 +96,15 @@ nv50_tex_construct(struct nv50_context *nv50, struct nouveau_stateobj *so,
        if (i == NV50_TEX_FORMAT_LIST_SIZE)
                 return 1;
 
+       mode = (nv50->sampler[unit]->normalized ? 0xd0005000 : 0x5001d000) |
+              (mt->base.bo->tile_mode << 22);
+       if (pf_type(mt->base.base.format) == PIPE_FORMAT_TYPE_SRGB)
+               mode |= 0x0400;
+
        so_data (so, nv50_tex_format_list[i].hw);
        so_reloc(so, mt->base.bo, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_LOW |
                     NOUVEAU_BO_RD, 0, 0);
-       if (nv50->sampler[unit]->normalized)
-               so_data (so, 0xd0005000 | mt->base.bo->tile_mode << 22);
-       else
-               so_data (so, 0x5001d000 | mt->base.bo->tile_mode << 22);
+       so_data (so, mode);
        so_data (so, 0x00300000);
        so_data (so, mt->base.base.width[0]);
        so_data (so, (mt->base.base.last_level << 28) |

diff --git a/src/gallium/drivers/nv50/nv50_texture.h b/src/gallium/drivers/nv50/nv50_texture.h
index 13f74c11c6b8aa50bab800bb2a12702364dd5737..d531e6113278463b2f2915e72f2d86843ca6cfb9 100644 (file)
--- a/src/gallium/drivers/nv50/nv50_texture.h
+++ b/src/gallium/drivers/nv50/nv50_texture.h
@@ -38,18 +38,26 @@
 #define NV50TIC_0_0_TYPEA_MASK                                    0x00038000
 #define NV50TIC_0_0_TYPEA_UNORM                                   0x00010000
 #define NV50TIC_0_0_TYPEA_SNORM                                   0x00008000
+#define NV50TIC_0_0_TYPEA_SINT                                    0x00018000
+#define NV50TIC_0_0_TYPEA_UINT                                    0x00020000
 #define NV50TIC_0_0_TYPEA_FLOAT                                   0x00038000
 #define NV50TIC_0_0_TYPEB_MASK                                    0x00007000
 #define NV50TIC_0_0_TYPEB_UNORM                                   0x00002000
 #define NV50TIC_0_0_TYPEB_SNORM                                   0x00001000
+#define NV50TIC_0_0_TYPEB_SINT                                    0x00003000
+#define NV50TIC_0_0_TYPEB_UINT                                    0x00004000
 #define NV50TIC_0_0_TYPEB_FLOAT                                   0x00007000
 #define NV50TIC_0_0_TYPEG_MASK                                    0x00000e00
 #define NV50TIC_0_0_TYPEG_UNORM                                   0x00000400
 #define NV50TIC_0_0_TYPEG_SNORM                                   0x00000200
+#define NV50TIC_0_0_TYPEG_SINT                                    0x00000600
+#define NV50TIC_0_0_TYPEG_UINT                                    0x00000800
 #define NV50TIC_0_0_TYPEG_FLOAT                                   0x00000e00
 #define NV50TIC_0_0_TYPER_MASK                                    0x000001c0
 #define NV50TIC_0_0_TYPER_UNORM                                   0x00000080
 #define NV50TIC_0_0_TYPER_SNORM                                   0x00000040
+#define NV50TIC_0_0_TYPER_SINT                                    0x000000c0
+#define NV50TIC_0_0_TYPER_UINT                                    0x00000100
 #define NV50TIC_0_0_TYPER_FLOAT                                   0x000001c0
 #define NV50TIC_0_0_FMT_MASK                                      0x0000003f
 #define NV50TIC_0_0_FMT_32_32_32_32                               0x00000001
@@ -57,6 +65,7 @@
 #define NV50TIC_0_0_FMT_32_32                                     0x00000004
 #define NV50TIC_0_0_FMT_8_8_8_8                                   0x00000008
 #define NV50TIC_0_0_FMT_2_10_10_10                                0x00000009
+#define NV50TIC_0_0_FMT_16_16                                     0x0000000c
 #define NV50TIC_0_0_FMT_32                                        0x0000000f
 #define NV50TIC_0_0_FMT_4_4_4_4                                   0x00000012
 /* #define NV50TIC_0_0_FMT_1_5_5_5                                0x00000013 */
@@ -65,12 +74,16 @@
 #define NV50TIC_0_0_FMT_8_8                                       0x00000018
 #define NV50TIC_0_0_FMT_16                                        0x0000001b
 #define NV50TIC_0_0_FMT_8                                         0x0000001d
+#define NV50TIC_0_0_FMT_5_9_9_9                                   0x00000020
 #define NV50TIC_0_0_FMT_10_11_11                                  0x00000021
 #define NV50TIC_0_0_FMT_DXT1                                      0x00000024
 #define NV50TIC_0_0_FMT_DXT3                                      0x00000025
 #define NV50TIC_0_0_FMT_DXT5                                      0x00000026
 #define NV50TIC_0_0_FMT_RGTC1                                     0x00000027
 #define NV50TIC_0_0_FMT_RGTC2                                     0x00000028
+#define NV50TIC_0_0_FMT_24_8                                      0x00000029
+#define NV50TIC_0_0_FMT_32_DEPTH                                  0x0000002f
+#define NV50TIC_0_0_FMT_32_8                                      0x00000030
 
 #define NV50TIC_0_1_OFFSET_LOW_MASK                               0xffffffff
 #define NV50TIC_0_1_OFFSET_LOW_SHIFT                                       0