re PR target/77270 (Flag -mprftchw is shared with 3dnow for -march=k8)

	PR target/77270
	* config/i386/i386.md (prefetch): When TARGET_PRFCHW or
	TARGET_PREFETCHWT1 are disabled, emit 3dNOW! write prefetches for
	non-SSE2 athlons only, otherwise prefer SSE prefetches.

From-SVN: r239643

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 2c27cb55fc9b518d0a0d3ce5f947c94e8dd52bb1..265cc292e26756ab2f346afb3f5b06e80c7d4157 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2016-08-21  Uros Bizjak  <ubizjak@gmail.com>
+
+       PR target/77270
+       * config/i386/i386.md (prefetch): When TARGET_PRFCHW or
+       TARGET_PREFETCHWT1 are disabled, emit 3dNOW! write prefetches for
+       non-SSE2 athlons only, otherwise prefer SSE prefetches.
+
 2016-08-20  Kugan Vivekanandarajah  <kuganv@linaro.org>
 
        * tree-vrp.c (vrp_visit_assignment_or_call): Changed to Return VR.

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 36ae87652f8a1493d6a1c8a3d72b7859da1eba6f..945445826c3ffab9918d829e315cec28cc239504 100644 (file)
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -18634,20 +18634,24 @@
   gcc_assert (IN_RANGE (locality, 0, 3));
 
   /* Use 3dNOW prefetch in case we are asking for write prefetch not
-     supported by SSE counterpart or the SSE prefetch is not available
-     (K6 machines).  Otherwise use SSE prefetch as it allows specifying
-     of locality.  */
+     supported by SSE counterpart (non-SSE2 athlon machines) or the
+     SSE prefetch is not available (K6 machines).  Otherwise use SSE
+     prefetch as it allows specifying of locality.  */
 
   if (write)
     {
       if (TARGET_PREFETCHWT1)
        operands[2] = GEN_INT (MAX (locality, 2)); 
-      else if (TARGET_3DNOW || TARGET_PRFCHW)
+      else if (TARGET_PRFCHW)
        operands[2] = GEN_INT (3);
+      else if (TARGET_3DNOW && !TARGET_SSE2)
+       operands[2] = GEN_INT (3);
+      else if (TARGET_PREFETCH_SSE)
+       operands[1] = const0_rtx;
       else
        {
-         gcc_assert (TARGET_PREFETCH_SSE);
-         operands[1] = const0_rtx;
+         gcc_assert (TARGET_3DNOW);
+         operands[2] = GEN_INT (3);
        }
     }
   else