MIPS/GAS: Use FCSR rather than RA with CFC1/CTC1

Fix an issue caused by commit f9419b056fe2 ("MIPS gas: code cleanup"),
<https://sourceware.org/ml/binutils/2002-05/msg00192.html>, and replace
the incorrect use of RA with the CFC1 and CTC1 instructions with FCSR.
While the register referred by its number is $31 in both cases, these
instructions operate on the floating-point control register file rather
than general-purpose registers.

	gas/
	* config/tc-mips.c (FCSR): New macro.
	(macro) <M_TRUNCWS, M_TRUNCWD>: Use it in place of RA.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 49d2ceb058b5a3baf7d347abcda8b7d85df01109..1eb7b39890b57eb1f20680e8d8b0eac2d0ca3418 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2021-05-29  Maciej W. Rozycki  <macro@orcam.me.uk>
+
+       * config/tc-mips.c (FCSR): New macro.
+       (macro) <M_TRUNCWS, M_TRUNCWD>: Use it in place of RA.
+
 2021-05-28  H.J. Lu  <hongjiu.lu@intel.com>
 
        PR ld/27905

diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index 9151b222a485208658e72a2caf52f0e8f1e29e2c..a83a55075ad656f2068bed090eb0c38a54f22cbe 100644 (file)
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -104,6 +104,8 @@ static char *mips_flags_frag;
 #define FP  30
 #define RA  31
 
+#define FCSR 31
+
 #define ILLEGAL_REG (32)
 
 #define AT  mips_opts.at
@@ -13835,18 +13837,18 @@ macro (struct mips_cl_insn *ip, char *str)
        * or is there a reason for it?
        */
       start_noreorder ();
-      macro_build (NULL, "cfc1", "t,G", op[2], RA);
-      macro_build (NULL, "cfc1", "t,G", op[2], RA);
+      macro_build (NULL, "cfc1", "t,G", op[2], FCSR);
+      macro_build (NULL, "cfc1", "t,G", op[2], FCSR);
       macro_build (NULL, "nop", "");
       expr1.X_add_number = 3;
       macro_build (&expr1, "ori", "t,r,i", AT, op[2], BFD_RELOC_LO16);
       expr1.X_add_number = 2;
       macro_build (&expr1, "xori", "t,r,i", AT, AT, BFD_RELOC_LO16);
-      macro_build (NULL, "ctc1", "t,G", AT, RA);
+      macro_build (NULL, "ctc1", "t,G", AT, FCSR);
       macro_build (NULL, "nop", "");
       macro_build (NULL, mask == M_TRUNCWD ? "cvt.w.d" : "cvt.w.s", "D,S",
                   op[0], op[1]);
-      macro_build (NULL, "ctc1", "t,G", op[2], RA);
+      macro_build (NULL, "ctc1", "t,G", op[2], FCSR);
       macro_build (NULL, "nop", "");
       end_noreorder ();
       break;