Commit
292676c1 resolved PLT32 reloc aganst local symbol to section.
Since PLT32 relocation must be against symbols, turn such PLT32
relocation into PC32 relocation.
gas/
PR gas/26263
* config/tc-i386.c (i386_validate_fix): Change PLT32 reloc
against section to PC32 reloc.
* testsuite/gas/i386/relax-5.d: Updated.
* testsuite/gas/i386/x86-64-relax-4.d: Likewise.
ld/
PR gas/26263
* testsuite/ld-i386/i386.exp: Run PR gas/26263 test.
* testsuite/ld-x86-64/x86-64.exp: Likewise.
* testsuite/ld-i386/pr26263.d: New file.
* testsuite/ld-x86-64/pr26263.d: Likewise.
* testsuite/ld-x86-64/pr26263.s: Likewise.
+2020-07-19 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/26263
+ * config/tc-i386.c (i386_validate_fix): Change PLT32 reloc
+ against section to PC32 reloc.
+ * testsuite/gas/i386/relax-5.d: Updated.
+ * testsuite/gas/i386/x86-64-relax-4.d: Likewise.
+
2020-07-15 H.J. Lu <hongjiu.lu@intel.com>
PR gas/26237
}
}
#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
- else if (!object_64bit)
+ else
{
- if (fixp->fx_r_type == BFD_RELOC_386_GOT32
- && fixp->fx_tcbit2)
- fixp->fx_r_type = BFD_RELOC_386_GOT32X;
+ /* NB: Commit 292676c1 resolved PLT32 reloc aganst local symbol
+ to section. Since PLT32 relocation must be against symbols,
+ turn such PLT32 relocation into PC32 relocation. */
+ if (fixp->fx_addsy
+ && (fixp->fx_r_type == BFD_RELOC_386_PLT32
+ || fixp->fx_r_type == BFD_RELOC_X86_64_PLT32)
+ && symbol_section_p (fixp->fx_addsy))
+ fixp->fx_r_type = BFD_RELOC_32_PCREL;
+ if (!object_64bit)
+ {
+ if (fixp->fx_r_type == BFD_RELOC_386_GOT32
+ && fixp->fx_tcbit2)
+ fixp->fx_r_type = BFD_RELOC_386_GOT32X;
+ }
}
#endif
}
Disassembly of section .init.text:
0+ <foo>:
- +[a-f0-9]+: e8 fb ff ff ff call 0 <foo> 1: R_386_PLT32 .text
+ +[a-f0-9]+: e8 fc ff ff ff call 1 <foo\+0x1> 1: R_386_PC32 .text
+[a-f0-9]+: e8 fc ff ff ff call 6 <foo\+0x6> 6: R_386_PC32 .text
#pass
Disassembly of section .init.text:
0+ <foo>:
- +[a-f0-9]+: e8 00 00 00 00 call 5 <foo\+0x5> 1: R_X86_64_PLT32 .text-0x4
+ +[a-f0-9]+: e8 00 00 00 00 call 5 <foo\+0x5> 1: R_X86_64_PC32 .text-0x4
+[a-f0-9]+: 48 8d 05 00 00 00 00 lea 0x0\(%rip\),%rax # c <foo\+0xc> 8: R_X86_64_PC32 .text-0x4
#pass
+2020-07-19 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/26263
+ * testsuite/ld-i386/i386.exp: Run PR gas/26263 test.
+ * testsuite/ld-x86-64/x86-64.exp: Likewise.
+ * testsuite/ld-i386/pr26263.d: New file.
+ * testsuite/ld-x86-64/pr26263.d: Likewise.
+ * testsuite/ld-x86-64/pr26263.s: Likewise.
+
2020-07-19 Hans-Peter Nilsson <hp@bitrange.com>
* scripttempl/elf.sc (ETEXT_LAST_IN_RODATA_SEGMENT): New variable.
run_dump_test "pr24322b"
run_dump_test "align-branch-1"
run_dump_test "pr26018"
+run_dump_test "pr26263"
if { !([istarget "i?86-*-linux*"]
|| [istarget "i?86-*-gnu*"]
--- /dev/null
+#source: ../ld-x86-64/pr26263.s
+#as: --32
+#ld: -shared -melf_i386
+#objdump: -dw
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+1000 <printk>:
+ +[a-f0-9]+: c3 ret
+
+Disassembly of section .init.text:
+
+0+1001 <foo>:
+ +[a-f0-9]+: e8 fa ff ff ff call 1000 <printk>
+ +[a-f0-9]+: e8 f5 ff ff ff call 1000 <printk>
+#pass
--- /dev/null
+#as: --64
+#ld: -m elf_x86_64 -shared
+#objdump: -dw
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+1000 <printk>:
+ +[a-f0-9]+: c3 ret
+
+Disassembly of section .init.text:
+
+0+1001 <foo>:
+ +[a-f0-9]+: e8 fa ff ff ff call 1000 <printk>
+ +[a-f0-9]+: e8 f5 ff ff ff call 1000 <printk>
+#pass
--- /dev/null
+ .section .init.text,"ax",@progbits
+ .global foo
+foo:
+ call printk
+ call printk@PLT
+ .text
+printk:
+ ret
run_dump_test "tlsdesc2"
run_dump_test "pr22048"
run_dump_test "pr22929"
+run_dump_test "pr26263"
proc undefined_weak {cflags ldflags} {
set testname "Undefined weak symbol"