re PR testsuite/87433 (gcc.dg/zero_bits_compound-1.c and gcc.target/aarch64/ashltidis...

2018-09-28  Steve Ellcey  <sellcey@cavium.com>

	PR testsuite/87433
	* gcc.dg/zero_bits_compound-1.c: Do not run on aarch64*-*-*.

From-SVN: r264691

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 25f6df62716e23e5422105569bf6d03b969bfc2f..c62b37c67cca4baddd15e2b40caf16fb01158be4 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2018-09-28  Steve Ellcey  <sellcey@cavium.com>
+
+       PR testsuite/87433
+       * gcc.dg/zero_bits_compound-1.c: Do not run on aarch64*-*-*.
+
 2018-09-28  Eric Botcazou  <ebotcazou@adacore.com>
 
        * gcc.target/sparc/20160229-1.c: Minor tweak.

diff --git a/gcc/testsuite/gcc.dg/zero_bits_compound-1.c b/gcc/testsuite/gcc.dg/zero_bits_compound-1.c
index 63b8ac128f3cf2780ebb359584c396df9cee3611..e71594911b2a4685b8e81575b200dc0772b271bb 100644 (file)
--- a/gcc/testsuite/gcc.dg/zero_bits_compound-1.c
+++ b/gcc/testsuite/gcc.dg/zero_bits_compound-1.c
@@ -4,7 +4,7 @@
 /* Note: This test requires that char, int and long have different sizes and the
    target has a way to do 32 -> 64 bit zero extension other than AND.  */
 
-/* { dg-do compile { target i?86-*-* x86_64-*-* s390*-*-* aarch64*-*-* } } */
+/* { dg-do compile { target i?86-*-* x86_64-*-* s390*-*-* } } */
 /* { dg-require-effective-target lp64 } */
 /* { dg-options "-O3 -dP" } */