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diff --git a/openpower/sv/remap.mdwn b/openpower/sv/remap.mdwn
index fe2055661d5a68f27f89b214c423890cba8c2ebb..6bbfb88a61bc6c5621b4306ad224ece76aad8a4f 100644 (file)
--- a/openpower/sv/remap.mdwn
+++ b/openpower/sv/remap.mdwn
@@ -334,7 +334,9 @@ with an Index exceeding VL-1.*
 
 Vector Reduce Mode issues a deterministic tree-reduction schedule to the underlying micro-architecture.  Like Scalar reduction, the "Scalar Base"
 (Power ISA v3.0B) operation is leveraged, unmodified, to give the
-*appearance* and *effect* of Reduction.
+*appearance* and *effect* of Reduction. Parallel Reduction is not limited
+to Power-of-two but is limited as usual by the total number of
+element operations (127) as well as available register file size.
 
 In Horizontal-First Mode, Vector-result reduction **requires**
 the destination to be a Vector, which will be used to store