ARM: Fix issue with with way MPIDR is read to include affinity levels.

The simple_bootloader checks for CPU0 in a manner incompatible with systems
actually using affinity levels -- just looking at MPIDR[7:0].  However, in
future we may wish to use real affinity levels and this method will be in danger
of matching several CPUs with affinity0 = 0.

Match affinity2 == affinity1 == affinity0 == 0 instead.

diff --git a/system/arm/simple_bootloader/simple.S b/system/arm/simple_bootloader/simple.S
index afba4772899e270118e281c432604295ab7afbf5..4870eccf8fa5e1a6eab4c335da6e76f0b6f9c9f6 100644 (file)
--- a/system/arm/simple_bootloader/simple.S
+++ b/system/arm/simple_bootloader/simple.S
@@ -68,8 +68,7 @@ _entry:
 
 bootldr:
     mrc p15, 0, r8, c0, c0, 5 // get the MPIDR register
-    uxtb r8, r8               // isolate the lower 8 bits (affinity lvl 1)
-    adds r8, r8, #0           // set flags for branch
+    bics r8, r8, #0xff000000  // isolate the lower 24 bits (affinity levels)
     bxeq r3                   // if it's 0 (CPU 0), branch to kernel
     mov  r8, #1
     str  r8, [r4, #0]         //  Enable CPU interface on GIC