i965/vs: Move the other two src_reg/dst_reg constructors to brw_vec4.cpp.
authorEric Anholt <eric@anholt.net>
Wed, 4 Jul 2012 20:31:46 +0000 (13:31 -0700)
committerEric Anholt <eric@anholt.net>
Fri, 6 Jul 2012 21:20:33 +0000 (14:20 -0700)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
src/mesa/drivers/dri/i965/brw_vec4.cpp
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp

index 37bb33531e28fc9affe82a6090d95addf26da3ee..2941729c4a0976a474b922891d09d36dc6d391c6 100644 (file)
@@ -104,6 +104,36 @@ src_reg::src_reg(int32_t i)
    this->imm.i = i;
 }
 
+src_reg::src_reg(dst_reg reg)
+{
+   init();
+
+   this->file = reg.file;
+   this->reg = reg.reg;
+   this->reg_offset = reg.reg_offset;
+   this->type = reg.type;
+   this->reladdr = reg.reladdr;
+   this->fixed_hw_reg = reg.fixed_hw_reg;
+
+   int swizzles[4];
+   int next_chan = 0;
+   int last = 0;
+
+   for (int i = 0; i < 4; i++) {
+      if (!(reg.writemask & (1 << i)))
+         continue;
+
+      swizzles[next_chan++] = last = i;
+   }
+
+   for (; next_chan < 4; next_chan++) {
+      swizzles[next_chan] = last;
+   }
+
+   this->swizzle = BRW_SWIZZLE4(swizzles[0], swizzles[1],
+                                swizzles[2], swizzles[3]);
+}
+
 bool
 vec4_instruction::is_tex()
 {
@@ -154,6 +184,19 @@ dst_reg::dst_reg(struct brw_reg reg)
    this->fixed_hw_reg = reg;
 }
 
+dst_reg::dst_reg(src_reg reg)
+{
+   init();
+
+   this->file = reg.file;
+   this->reg = reg.reg;
+   this->reg_offset = reg.reg_offset;
+   this->type = reg.type;
+   this->writemask = WRITEMASK_XYZW;
+   this->reladdr = reg.reladdr;
+   this->fixed_hw_reg = reg.fixed_hw_reg;
+}
+
 bool
 vec4_instruction::is_math()
 {
index 25d3c92f8354a2c8a5df52a42760d085c65de5c2..c77dc91fc1f940cb435a1dd1dd477d31719e3521 100644 (file)
@@ -30,49 +30,6 @@ extern "C" {
 
 namespace brw {
 
-src_reg::src_reg(dst_reg reg)
-{
-   init();
-
-   this->file = reg.file;
-   this->reg = reg.reg;
-   this->reg_offset = reg.reg_offset;
-   this->type = reg.type;
-   this->reladdr = reg.reladdr;
-   this->fixed_hw_reg = reg.fixed_hw_reg;
-
-   int swizzles[4];
-   int next_chan = 0;
-   int last = 0;
-
-   for (int i = 0; i < 4; i++) {
-      if (!(reg.writemask & (1 << i)))
-        continue;
-
-      swizzles[next_chan++] = last = i;
-   }
-
-   for (; next_chan < 4; next_chan++) {
-      swizzles[next_chan] = last;
-   }
-
-   this->swizzle = BRW_SWIZZLE4(swizzles[0], swizzles[1],
-                               swizzles[2], swizzles[3]);
-}
-
-dst_reg::dst_reg(src_reg reg)
-{
-   init();
-
-   this->file = reg.file;
-   this->reg = reg.reg;
-   this->reg_offset = reg.reg_offset;
-   this->type = reg.type;
-   this->writemask = WRITEMASK_XYZW;
-   this->reladdr = reg.reladdr;
-   this->fixed_hw_reg = reg.fixed_hw_reg;
-}
-
 vec4_instruction::vec4_instruction(vec4_visitor *v,
                                   enum opcode opcode, dst_reg dst,
                                   src_reg src0, src_reg src1, src_reg src2)