https://bugs.libre-soc.org/show_bug.cgi?id=966#c4

corrections to shadd

diff --git a/openpower/isa/bitmanip.mdwn b/openpower/isa/bitmanip.mdwn
index 89515ec977385f3ffd7f91b253f795c7d55d69c8..5d4044886eb397c046b6cc9027f909d245e196c2 100644 (file)
--- a/openpower/isa/bitmanip.mdwn
+++ b/openpower/isa/bitmanip.mdwn
@@ -111,12 +111,8 @@ Z23-Form
 Pseudo-code:
 
     n <- (RB)
-    switch (sm)
-        case (0): sum[0:XLEN-1] = (n[0:XLEN-1-1] || [0]*1) + (RA)
-        case (1): sum[0:XLEN-1] = (n[0:XLEN-2-1] || [0]*2) + (RA)
-        case (2): sum[0:XLEN-1] = (n[0:XLEN-3-1] || [0]*3) + (RA)
-        default:  sum[0:XLEN-1] = (n[0:XLEN-4-1] || [0]*4) + (RA)
-    RT <- sum
+    m <- sm + 1
+    RT <- (n[m:XLEN-1] || [0]*m) + (RA)
 
 Special Registers Altered:
 
@@ -132,12 +128,8 @@ Z23-Form
 Pseudo-code:
 
     n <- ([0]*(XLEN/2)) || (RB)[XLEN/2:XLEN-1]
-    switch (sm)
-        case (0): sum[0:XLEN-1] = (n[0:XLEN-1-1] || [0]*1) + (RA)
-        case (1): sum[0:XLEN-1] = (n[0:XLEN-2-1] || [0]*2) + (RA)
-        case (2): sum[0:XLEN-1] = (n[0:XLEN-3-1] || [0]*3) + (RA)
-        default:  sum[0:XLEN-1] = (n[0:XLEN-4-1] || [0]*4) + (RA)
-    RT <- sum
+    m <- sm + 1
+    RT <- (n[m:XLEN-1] || [0]*m) + (RA)
 
 Special Registers Altered: