20090811-1.c: Skip for incompatible options, do not override other options.

	* gcc/testsuite/gcc.target/arm/20090811-1.c: Skip for incompatible
	options, do not override other options.
	* gcc/testsuite/gcc.target/arm/combine-cmp-shift.c: Skip for
	incompatible options.
	* gcc/testsuite/gcc.target/arm/pr45094.c: Likewise.
	* gcc/testsuite/gcc.target/arm/scd42-1.c: Likewise.
	* gcc/testsuite/gcc.target/arm/scd42-3.c: Likewise.
	* gcc/testsuite/gcc.target/arm/thumb-ltu.c: Likewise.

From-SVN: r174920

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 5c893e6a7967d3b6abe47a16b565fae99cfef646..fab84d57cebc8d5658ab9d9acd7e2713a11b6c53 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,5 +1,14 @@
 2011-06-10  Janis Johnson  <janisjo@codesourcery.com>
 
+       * gcc/testsuite/gcc.target/arm/20090811-1.c: Skip for incompatible
+       options, do not override other options.
+       * gcc/testsuite/gcc.target/arm/combine-cmp-shift.c: Skip for
+       incompatible options.
+       * gcc/testsuite/gcc.target/arm/pr45094.c: Likewise.
+       * gcc/testsuite/gcc.target/arm/scd42-1.c: Likewise.
+       * gcc/testsuite/gcc.target/arm/scd42-3.c: Likewise.
+       * gcc/testsuite/gcc.target/arm/thumb-ltu.c: Likewise.
+
        * lib/target-supports.exp
        (check_effective_target_arm_neon_fp16_ok_nocache): Return 0 if
        multilib flags use -mfpu with a value other than neon-fp16.

diff --git a/gcc/testsuite/gcc.target/arm/20090811-1.c b/gcc/testsuite/gcc.target/arm/20090811-1.c
index bc0dc93970fd77ccd60b4013cfd9465370dd1056..d82060126a3fcc902805d0d6b31964db6f9103da 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/20090811-1.c
+++ b/gcc/testsuite/gcc.target/arm/20090811-1.c
@@ -1,4 +1,7 @@
 /* { dg-do compile } */
+/* { dg-skip-if "incompatible options" { arm*-*-* } { "-march=*" } { "-march=armv7-a" } } */
+/* { dg-skip-if "do not override -mcpu" { *-*-* } { "-mcpu=*" } { "-mcpu=cortex-a8" } } */
+/* { dg-skip-if "do not override -mfloat-abi" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=softfp" } } */
 /* { dg-options "-O3 -mcpu=cortex-a8 -mfpu=vfp3 -mfloat-abi=softfp" } */
 
 typedef struct cb

diff --git a/gcc/testsuite/gcc.target/arm/combine-cmp-shift.c b/gcc/testsuite/gcc.target/arm/combine-cmp-shift.c
index 1cacc29c83323a113a91fc02b354c59fa921ba7d..a64f20e067538a75cb241fb3ac6213d5795d98dd 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/combine-cmp-shift.c
+++ b/gcc/testsuite/gcc.target/arm/combine-cmp-shift.c
@@ -1,3 +1,4 @@
+/* { dg-skip-if "incompatible options" { arm*-*-* } { "-march=*" } { "-march=armv7-a" } } */
 /* { dg-options "-O2 -mcpu=cortex-a8" }  */
 /* { dg-final { scan-assembler "cmp\tr\[0-9\]*, r\[0-9\]*, asr #31" } } */
 

diff --git a/gcc/testsuite/gcc.target/arm/pr45094.c b/gcc/testsuite/gcc.target/arm/pr45094.c
index 05f16d80279fff10fb5b1f195979beef21cd28da..f35e7bb2d7f1ed6ab41447a200811d062530f019 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/pr45094.c
+++ b/gcc/testsuite/gcc.target/arm/pr45094.c
@@ -1,4 +1,5 @@
 /* { dg-do run } */
+/* { dg-skip-if "incompatible options" { arm*-*-* } { "-march=*" } { "-march=armv7-a" } } */
 /* { dg-require-effective-target arm_neon_hw } */
 /* { dg-options "-O2 -mcpu=cortex-a8" } */
 /* { dg-add-options arm_neon } */

diff --git a/gcc/testsuite/gcc.target/arm/scd42-1.c b/gcc/testsuite/gcc.target/arm/scd42-1.c
index e02a898e6c55a28af0d35f3ac7b2ae4c78b654f3..2cd1eeb8f5039c13b1331d3c54496b42ce624416 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/scd42-1.c
+++ b/gcc/testsuite/gcc.target/arm/scd42-1.c
@@ -1,5 +1,6 @@
 /* Verify that mov is preferred on XScale for loading a 1 byte constant. */
 /* { dg-do compile } */
+/* { dg-skip-if "incompatible options" { arm*-*-* } { "-march=*" } { "" } } */
 /* { dg-options "-mcpu=xscale -O" } */
 
 unsigned load1(void) __attribute__ ((naked));

diff --git a/gcc/testsuite/gcc.target/arm/scd42-3.c b/gcc/testsuite/gcc.target/arm/scd42-3.c
index b2e66662c4bf6a202768ab5231f8cb60097d62c2..d1d07b0835e394a7210886287d4477a6eb1ba920 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/scd42-3.c
+++ b/gcc/testsuite/gcc.target/arm/scd42-3.c
@@ -1,5 +1,6 @@
 /* Verify that ldr is preferred on XScale for loading a 3 or 4 byte constant. */
 /* { dg-do compile } */
+/* { dg-skip-if "incompatible options" { arm*-*-* } { "-march=*" } { "" } } */
 /* { dg-options "-mcpu=xscale -O" } */
 
 unsigned load4(void) __attribute__ ((naked));

diff --git a/gcc/testsuite/gcc.target/arm/thumb-ltu.c b/gcc/testsuite/gcc.target/arm/thumb-ltu.c
index 899b8d23194ae4afa810827c58c58c31d01faf0b..24671213e5f60f065355dc082f8788526f2bc943 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/thumb-ltu.c
+++ b/gcc/testsuite/gcc.target/arm/thumb-ltu.c
@@ -1,4 +1,5 @@
 /* { dg-do compile } */
+/* { dg-skip-if "incompatible options" { arm*-*-* } { "-march=*" } { "-march=armv6" "-march=armv6j" "-march=armv6z" } } */
 /* { dg-options "-mcpu=arm1136jf-s -mthumb -O2" } */
 
 void f(unsigned a, unsigned b, unsigned c, unsigned d)