radeonsi: don't wait for idle at the end of gfx IBs

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4894>

diff --git a/src/gallium/drivers/radeonsi/si_gfx_cs.c b/src/gallium/drivers/radeonsi/si_gfx_cs.c
index 30ba6b02f873ac7cc3f472d89e82387ebcd5fde9..087df67d61d97f9aed49e588f651fc04ea3eeec7 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_gfx_cs.c
+++ b/src/gallium/drivers/radeonsi/si_gfx_cs.c
@@ -78,6 +78,19 @@ void si_flush_gfx_cs(struct si_context *ctx, unsigned flags, struct pipe_fence_h
    if (ctx->gfx_flush_in_progress)
       return;
 
+   /* The amdgpu kernel driver always synchronizes execution for shared DMABUFs
+    * between processes, so we don't have to wait at the end of IBs to make sure
+    * everything is idle.
+    *
+    * The amdgpu winsys synchronizes execution for buffers shared by different
+    * contexts within the same process.
+    *
+    * Interop with AMDVLK, RADV, or OpenCL within the same process requires
+    * explicit fences or glFinish.
+    */
+   if (ctx->screen->info.is_amdgpu)
+      flags |= RADEON_FLUSH_START_NEXT_GFX_IB_NOW;
+
    if (!ctx->screen->info.kernel_flushes_tc_l2_after_ib) {
       wait_flags |= wait_ps_cs | SI_CONTEXT_INV_L2;
    } else if (ctx->chip_class == GFX6) {