add missing R200_RB3D_BLENDCOLOR to r200/radeon_sanity.c

diff --git a/src/mesa/drivers/dri/r200/r200_sanity.c b/src/mesa/drivers/dri/r200/r200_sanity.c
index a21495df4eaacb6add457dbea40a37a7fa5773b9..2de262ede33bb3eb954feea481646708eadada6f 100644 (file)
--- a/src/mesa/drivers/dri/r200/r200_sanity.c
+++ b/src/mesa/drivers/dri/r200/r200_sanity.c
@@ -139,6 +139,10 @@ static struct {
    { R200_PP_CUBIC_OFFSET_F1_4, 5, "R200_PP_CUBIC_OFFSET_F1_4" },
    { R200_PP_CUBIC_FACES_5, 1, "R200_PP_CUBIC_FACES_5" },
    { R200_PP_CUBIC_OFFSET_F1_5, 5, "R200_PP_CUBIC_OFFSET_F1_5" },
+   { RADEON_PP_TEX_SIZE_0, 2, "RADEON_PP_TEX_SIZE_0" },
+   { RADEON_PP_TEX_SIZE_1, 2, "RADEON_PP_TEX_SIZE_1" },
+   { RADEON_PP_TEX_SIZE_2, 2, "RADEON_PP_TEX_SIZE_2" },
+   { R200_RB3D_BLENDCOLOR, 3, "R200_RB3D_BLENDCOLOR" },
 };
 
 struct reg_names {
@@ -459,6 +463,7 @@ static struct reg_names reg_names[] = {
    { R200_PP_TXCBLEND2_7, "R200_PP_TXCBLEND2_7" },
    { R200_PP_TXABLEND_7, "R200_PP_TXABLEND_7" },
    { R200_PP_TXABLEND2_7, "R200_PP_TXABLEND2_7" },
+   { R200_RB3D_BLENDCOLOR, "R200_RB3D_BLENDCOLOR" },
    { R200_RB3D_ABLENDCNTL, "R200_RB3D_ABLENDCNTL" },
    { R200_RB3D_CBLENDCNTL, "R200_RB3D_CBLENDCNTL" },
    { R200_SE_TCL_OUTPUT_VTX_COMP_SEL, "R200_SE_TCL_OUTPUT_VTX_COMP_SEL" },

diff --git a/src/mesa/drivers/dri/radeon/radeon_sanity.c b/src/mesa/drivers/dri/radeon/radeon_sanity.c
index 11d0a33ce4ad76b6eed32ac8eae938517847c8f6..4a6d7d1b2a9d341cc5efc63d5827589ab4cb626b 100644 (file)
--- a/src/mesa/drivers/dri/radeon/radeon_sanity.c
+++ b/src/mesa/drivers/dri/radeon/radeon_sanity.c
@@ -138,6 +138,7 @@ static struct {
    { RADEON_PP_TEX_SIZE_0, 2, "RADEON_PP_TEX_SIZE_0" },
    { RADEON_PP_TEX_SIZE_1, 2, "RADEON_PP_TEX_SIZE_1" },
    { RADEON_PP_TEX_SIZE_2, 2, "RADEON_PP_TEX_SIZE_2" },
+       { 0, 3, "R200_RB3D_BLENDCOLOR" },
 };
 
 struct reg_names {