lhs-1.c: Fix testcase to avoid subreg changes.

	* gcc.target/powerpc/lhs-1.c: Fix testcase to avoid subreg changes.

From-SVN: r236672

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 39c6b27cebfd22742fb698f27ca0115c4677e802..a2821a7c9c7aabd7cf0232150c5e616f1ea92fc0 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2016-05-24  Pat Haugen  <pthaugen@us.ibm.com>
+
+       PR target/71050
+       * gcc.target/powerpc/lhs-1.c: Fix testcase to avoid subreg changes.
+
 2016-05-24  Paolo Carlini  <paolo.carlini@oracle.com>
 
        PR c++/50436

diff --git a/gcc/testsuite/gcc.target/powerpc/lhs-1.c b/gcc/testsuite/gcc.target/powerpc/lhs-1.c
index 4bd8c890b952e8355a5c9f8c7893edfd3abbd61a..2979711e3925b01feac776ffe8269fac49f0d706 100644 (file)
--- a/gcc/testsuite/gcc.target/powerpc/lhs-1.c
+++ b/gcc/testsuite/gcc.target/powerpc/lhs-1.c
@@ -4,19 +4,12 @@
 /* { dg-options "-O2 -mcpu=power5" } */
 /* { dg-final { scan-assembler-times "nop" 3 } } */
 
-/* Test generation of nops in load hit store situation.  */
+/* Test generation of nops in load hit store situation.  Make sure enough nop
+   insns are generated to move the load to a new dispatch group.  With the
+   simple stw/lwz pair below, that would be 3 nop insns for Power5.  */
 
-typedef union {
-  double val;
-  struct {
-    unsigned int w1;
-    unsigned int w2;
-  };
-} words;
-
-unsigned int f (double d, words *u)
+unsigned int f (volatile unsigned int *u, unsigned int u2)
 {
-  u->val = d;
-  return u->w2;
+  *u = u2;
+  return *u;
 }
-