arch,sim: Return whether or not a pseudo inst was recognized.

Otherwise there's no way to distinguish whether return values are from
the calls themselves, including what they mean in the context (success
or failure?) or the pseudo inst dispatch function itself.

Change-Id: I3e71c277f175c69af0d1adeb3299d88d095dfa84
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25948
Tested-by: Gem5 Cloud Project GCB service account <345032938727@cloudbuild.gserviceaccount.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Alexandru Duțu <alexandru.dutu@amd.com>

diff --git a/src/arch/arm/tlb.cc b/src/arch/arm/tlb.cc
index 5a92a0c33ac77981bbfd0defbeb6d1e6c652264c..84160bba845b9363d5044e68eb592c734785facb 100644 (file)
--- a/src/arch/arm/tlb.cc
+++ b/src/arch/arm/tlb.cc
@@ -141,7 +141,8 @@ TLB::finalizePhysical(const RequestPtr &req,
         req->setLocalAccessor(
             [func, mode](ThreadContext *tc, PacketPtr pkt) -> Cycles
             {
-                uint64_t ret = PseudoInst::pseudoInst<PseudoInstABI>(tc, func);
+                uint64_t ret;
+                PseudoInst::pseudoInst<PseudoInstABI>(tc, func, ret);
                 if (mode == Read)
                     pkt->setLE(ret);
                 return Cycles(1);

diff --git a/src/arch/x86/tlb.cc b/src/arch/x86/tlb.cc
index 46bab4815db572b784aa19f3db77b3d1d6d620ae..53492b0330b2e45b2ea3be77b9fab314fe0f9d58 100644 (file)
--- a/src/arch/x86/tlb.cc
+++ b/src/arch/x86/tlb.cc
@@ -265,8 +265,8 @@ TLB::finalizePhysical(const RequestPtr &req,
         req->setLocalAccessor(
             [func, mode](ThreadContext *tc, PacketPtr pkt) -> Cycles
             {
-                uint64_t ret =
-                    PseudoInst::pseudoInst<X86PseudoInstABI>(tc, func);
+                uint64_t ret;
+                PseudoInst::pseudoInst<X86PseudoInstABI>(tc, func, ret);
                 if (mode == Read)
                     pkt->setLE(ret);
                 return Cycles(1);

diff --git a/src/sim/pseudo_inst.hh b/src/sim/pseudo_inst.hh
index fbf997a9c16f8f877247f27a4d492339cc79d096..be9e5bb639065a2678f194dae89e249b295a17c4 100644 (file)
--- a/src/sim/pseudo_inst.hh
+++ b/src/sim/pseudo_inst.hh
@@ -130,100 +130,109 @@ void togglesync(ThreadContext *tc);
  * manner using the ISA-specific getArguments functions.
  *
  * @param func M5 pseudo op major function number (see utility/m5/m5ops.h)
+ * @param result A reference to a uint64_t to store a result in.
+ * @return Whether the pseudo instruction was recognized/handled.
  */
 
 template <typename ABI>
-uint64_t
-pseudoInst(ThreadContext *tc, uint8_t func)
+bool
+pseudoInst(ThreadContext *tc, uint8_t func, uint64_t &result)
 {
     DPRINTF(PseudoInst, "PseudoInst::pseudoInst(%i)\n", func);
 
+    result = 0;
+
     switch (func) {
       case M5OP_ARM:
         invokeSimcall<ABI>(tc, arm);
-        break;
+        return true;
 
       case M5OP_QUIESCE:
         invokeSimcall<ABI>(tc, quiesce);
-        break;
+        return true;
 
       case M5OP_QUIESCE_NS:
         invokeSimcall<ABI>(tc, quiesceNs);
-        break;
+        return true;
 
       case M5OP_QUIESCE_CYCLE:
         invokeSimcall<ABI>(tc, quiesceCycles);
-        break;
+        return true;
 
       case M5OP_QUIESCE_TIME:
-        return invokeSimcall<ABI>(tc, quiesceTime);
+        result = invokeSimcall<ABI>(tc, quiesceTime);
+        return true;
 
       case M5OP_RPNS:
-        return invokeSimcall<ABI>(tc, rpns);
+        result = invokeSimcall<ABI>(tc, rpns);
+        return true;
 
       case M5OP_WAKE_CPU:
         invokeSimcall<ABI>(tc, wakeCPU);
-        break;
+        return true;
 
       case M5OP_EXIT:
         invokeSimcall<ABI>(tc, m5exit);
-        break;
+        return true;
 
       case M5OP_FAIL:
         invokeSimcall<ABI>(tc, m5fail);
-        break;
+        return true;
 
       case M5OP_INIT_PARAM:
-        return invokeSimcall<ABI>(tc, initParam);
+        result = invokeSimcall<ABI>(tc, initParam);
+        return true;
 
       case M5OP_LOAD_SYMBOL:
         invokeSimcall<ABI>(tc, loadsymbol);
-        break;
+        return true;
 
       case M5OP_RESET_STATS:
         invokeSimcall<ABI>(tc, resetstats);
-        break;
+        return true;
 
       case M5OP_DUMP_STATS:
         invokeSimcall<ABI>(tc, dumpstats);
-        break;
+        return true;
 
       case M5OP_DUMP_RESET_STATS:
         invokeSimcall<ABI>(tc, dumpresetstats);
-        break;
+        return true;
 
       case M5OP_CHECKPOINT:
         invokeSimcall<ABI>(tc, m5checkpoint);
-        break;
+        return true;
 
       case M5OP_WRITE_FILE:
-        return invokeSimcall<ABI>(tc, writefile);
+        result = invokeSimcall<ABI>(tc, writefile);
+        return true;
 
       case M5OP_READ_FILE:
-        return invokeSimcall<ABI>(tc, readfile);
+        result = invokeSimcall<ABI>(tc, readfile);
+        return true;
 
       case M5OP_DEBUG_BREAK:
         invokeSimcall<ABI>(tc, debugbreak);
-        break;
+        return true;
 
       case M5OP_SWITCH_CPU:
         invokeSimcall<ABI>(tc, switchcpu);
-        break;
+        return true;
 
       case M5OP_ADD_SYMBOL:
         invokeSimcall<ABI>(tc, addsymbol);
-        break;
+        return true;
 
       case M5OP_PANIC:
         panic("M5 panic instruction called at %s\n", tc->pcState());
 
       case M5OP_WORK_BEGIN:
         invokeSimcall<ABI>(tc, workbegin);
-        break;
+        return true;
 
       case M5OP_WORK_END:
         invokeSimcall<ABI>(tc, workend);
-        break;
+        return true;
 
       case M5OP_ANNOTATE:
       case M5OP_RESERVED2:
@@ -231,28 +240,26 @@ pseudoInst(ThreadContext *tc, uint8_t func)
       case M5OP_RESERVED4:
       case M5OP_RESERVED5:
         warn("Unimplemented m5 op (%#x)\n", func);
-        break;
+        return false;
 
       /* SE mode functions */
       case M5OP_SE_SYSCALL:
         invokeSimcall<ABI>(tc, m5Syscall);
-        break;
+        return true;
 
       case M5OP_SE_PAGE_FAULT:
         invokeSimcall<ABI>(tc, TheISA::m5PageFault);
-        break;
+        return true;
 
       /* dist-gem5 functions */
       case M5OP_DIST_TOGGLE_SYNC:
         invokeSimcall<ABI>(tc, togglesync);
-        break;
+        return true;
 
       default:
         warn("Unhandled m5 op: %#x\n", func);
-        break;
+        return false;
     }
-
-    return 0;
 }
 
 } // namespace PseudoInst