minor_4.csv: support shadd/shadduw instructions

diff --git a/openpower/isatables/minor_22.csv b/openpower/isatables/minor_22.csv
index 0935512ac2a35ba7906a7c441d1c21d79deee44a..e696ad4a33818db90c2a49a008c004b4fc76bfb6 100644 (file)
--- a/openpower/isatables/minor_22.csv
+++ b/openpower/isatables/minor_22.csv
@@ -31,10 +31,13 @@ opcode,unit,internal op,in1,in2,in3,out,CR in,CR out,inv A,inv out,cry in,cry ou
 0101001110-,ALU,OP_MINMAX,RA,RB,NONE,RT,NONE,CR0,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC_ONLY,0,0,mins,X,,1,unofficial until submitted and approved/renumbered by the opf isa wg
 0001001110-,ALU,OP_MINMAX,RA,RB,NONE,RT,NONE,CR0,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC_ONLY,0,0,minu,X,,1,unofficial until submitted and approved/renumbered by the opf isa wg
 1101001110-,ALU,OP_AVGADD,RA,RB,NONE,RT,NONE,CR0,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC_ONLY,0,0,avgadd,X,,1,unofficial until submitted and approved/renumbered by the opf isa wg
+--01101110-,ALU,OP_SHADD,RA,RB,NONE,RT,NONE,CR0,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC_ONLY,0,0,shadd,Z23,,1,unofficial until submitted and approved/renumbered by the opf isa wg
+--11101110-,ALU,OP_SHADD,RA,RB,NONE,RT,NONE,CR0,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC_ONLY,0,0,shadduw,Z23,,1,unofficial until submitted and approved/renumbered by the opf isa wg
 1011110110-,ALU,OP_ABSDIFF,RA,RB,NONE,RT,NONE,CR0,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC_ONLY,0,0,absdu,X,,1,unofficial until submitted and approved/renumbered by the opf isa wg
 1001110110-,ALU,OP_ABSDIFF,RA,RB,NONE,RT,NONE,CR0,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC_ONLY,0,0,absds,X,,1,unofficial until submitted and approved/renumbered by the opf isa wg
 1111110110-,ALU,OP_ABSADD,RA,RB,RT,RT,NONE,CR0,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC_ONLY,0,0,absdacu,X,,1,unofficial until submitted and approved/renumbered by the opf isa wg
 0111110110-,ALU,OP_ABSADD,RA,RB,RT,RT,NONE,CR0,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC_ONLY,0,0,absdacs,X,,1,unofficial until submitted and approved/renumbered by the opf isa wg
+
 # Vector bitmanip
 0110001110-,ALU,OP_CPROP,RA,RB,NONE,RT,NONE,CR0,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC_ONLY,0,0,cprop,X,,1,unofficial until submitted and approved/renumbered by the opf isa wg
 ------10001,ALU,OP_BMASK,RA,RB,NONE,RT,NONE,NONE,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,bmask,BM2,,1,unofficial until submitted and approved/renumbered by the opf isa wg

diff --git a/src/openpower/decoder/power_enums.py b/src/openpower/decoder/power_enums.py
index 7177776044eead71db5164b0f5f4f66d68fdd1df..9c6ec88b3b8bd6370ad548449224860297bdbcdb 100644 (file)
--- a/src/openpower/decoder/power_enums.py
+++ b/src/openpower/decoder/power_enums.py
@@ -710,6 +710,7 @@ class MicrOp(Enum):
     OP_DIVMOD2DU = 100
     OP_DSHL = 101
     OP_DSHR = 102
+    OP_SHADD = 103
 
 
 @unique