[libre-riscv-dev] [Bug 304] Define minimum viable interface set for 180nm ASIC
authorbugzilla-daemon <bugzilla-daemon@libre-soc.org>
Tue, 12 May 2020 12:14:24 +0000 (12:14 +0000)
committerlibre-riscv-dev <libre-riscv-dev@lists.libre-riscv.org>
Tue, 12 May 2020 12:14:26 +0000 (13:14 +0100)
0a/81f8ee6e85ce9b9f5af22015c8f5f29a5dbd67 [new file with mode: 0644]

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+Date: Tue, 12 May 2020 12:14:24 +0000
+X-Bugzilla-Reason: CC
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+X-Bugzilla-Product: Libre-SOC's first SoC
+X-Bugzilla-Component: Source Code
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+X-Bugzilla-Severity: enhancement
+X-Bugzilla-Who: yimmanuel3@gatech.edu
+X-Bugzilla-Status: CONFIRMED
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+X-Bugzilla-Priority: ---
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+Message-ID: <bug-304-13-63eQlCAD9f@https.bugs.libre-soc.org/>
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+Subject: [libre-riscv-dev] [Bug 304] Define minimum viable interface set for
+ 180nm ASIC
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+aHR0cHM6Ly9idWdzLmxpYnJlLXNvYy5vcmcvc2hvd19idWcuY2dpP2lkPTMwNAoKLS0tIENvbW1l
+bnQgIzUgZnJvbSBZZWhvd3NodWEgPHlpbW1hbnVlbDNAZ2F0ZWNoLmVkdT4gLS0tCk9LLiBJJ2xs
+IHRyeSBhbmQgaGF2ZSBpdCBmaW5pc2hlZCBieSBUaHVyc2RheSBhZnRlcm5vb24uCgotLSAKWW91
+IGFyZSByZWNlaXZpbmcgdGhpcyBtYWlsIGJlY2F1c2U6CllvdSBhcmUgb24gdGhlIENDIGxpc3Qg
+Zm9yIHRoZSBidWcuCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f
+X19fCmxpYnJlLXJpc2N2LWRldiBtYWlsaW5nIGxpc3QKbGlicmUtcmlzY3YtZGV2QGxpc3RzLmxp
+YnJlLXJpc2N2Lm9yZwpodHRwOi8vbGlzdHMubGlicmUtcmlzY3Yub3JnL21haWxtYW4vbGlzdGlu
+Zm8vbGlicmUtcmlzY3YtZGV2Cg==
+