MIPS/GAS/testsuite: Add tests for coprocessor branch instructions
authorMaciej W. Rozycki <macro@orcam.me.uk>
Sat, 29 May 2021 01:26:32 +0000 (03:26 +0200)
committerMaciej W. Rozycki <macro@orcam.me.uk>
Sat, 29 May 2021 01:26:32 +0000 (03:26 +0200)
Cover basic CP0, CP2, CP3 branch and branch-likely instructions across
the relevant ISA levels.  Omit CP1 branches, covered elsewhere.

gas/
* testsuite/gas/mips/cp0b.d: New test.
* testsuite/gas/mips/cp0bl.d: New test.
* testsuite/gas/mips/cp2b.d: New test.
* testsuite/gas/mips/micromips@cp2b.d: New test.
* testsuite/gas/mips/cp2bl.d: New test.
* testsuite/gas/mips/micromips@cp2bl.d: New test.
* testsuite/gas/mips/cp3b.d: New test.
* testsuite/gas/mips/cp3bl.d: New test.
* testsuite/gas/mips/cp0b.s: New test source.
* testsuite/gas/mips/cp0bl.s: New test source.
* testsuite/gas/mips/cp2b.s: New test source.
* testsuite/gas/mips/cp2bl.s: New test source.
* testsuite/gas/mips/cp3b.s: New test source.
* testsuite/gas/mips/cp3bl.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new tests.

16 files changed:
gas/ChangeLog
gas/testsuite/gas/mips/cp0b.d [new file with mode: 0644]
gas/testsuite/gas/mips/cp0b.s [new file with mode: 0644]
gas/testsuite/gas/mips/cp0bl.d [new file with mode: 0644]
gas/testsuite/gas/mips/cp0bl.s [new file with mode: 0644]
gas/testsuite/gas/mips/cp2b.d [new file with mode: 0644]
gas/testsuite/gas/mips/cp2b.s [new file with mode: 0644]
gas/testsuite/gas/mips/cp2bl.d [new file with mode: 0644]
gas/testsuite/gas/mips/cp2bl.s [new file with mode: 0644]
gas/testsuite/gas/mips/cp3b.d [new file with mode: 0644]
gas/testsuite/gas/mips/cp3b.s [new file with mode: 0644]
gas/testsuite/gas/mips/cp3bl.d [new file with mode: 0644]
gas/testsuite/gas/mips/cp3bl.s [new file with mode: 0644]
gas/testsuite/gas/mips/micromips@cp2b.d [new file with mode: 0644]
gas/testsuite/gas/mips/micromips@cp2bl.d [new file with mode: 0644]
gas/testsuite/gas/mips/mips.exp

index b4b6387d46fc45a21c4868e5e18c5a380ea4c864..e5c2ecf80f3dcf7740f3adbddef8b4e0367149f9 100644 (file)
@@ -1,3 +1,21 @@
+2021-05-29  Maciej W. Rozycki  <macro@orcam.me.uk>
+
+       * testsuite/gas/mips/cp0b.d: New test.
+       * testsuite/gas/mips/cp0bl.d: New test.
+       * testsuite/gas/mips/cp2b.d: New test.
+       * testsuite/gas/mips/micromips@cp2b.d: New test.
+       * testsuite/gas/mips/cp2bl.d: New test.
+       * testsuite/gas/mips/micromips@cp2bl.d: New test.
+       * testsuite/gas/mips/cp3b.d: New test.
+       * testsuite/gas/mips/cp3bl.d: New test.
+       * testsuite/gas/mips/cp0b.s: New test source.
+       * testsuite/gas/mips/cp0bl.s: New test source.
+       * testsuite/gas/mips/cp2b.s: New test source.
+       * testsuite/gas/mips/cp2bl.s: New test source.
+       * testsuite/gas/mips/cp3b.s: New test source.
+       * testsuite/gas/mips/cp3bl.s: New test source.
+       * testsuite/gas/mips/mips.exp: Run the new tests.
+
 2021-05-29  Maciej W. Rozycki  <macro@orcam.me.uk>
 
        * testsuite/gas/mips/rfe.d: New test.
diff --git a/gas/testsuite/gas/mips/cp0b.d b/gas/testsuite/gas/mips/cp0b.d
new file mode 100644 (file)
index 0000000..ad1e4d3
--- /dev/null
@@ -0,0 +1,12 @@
+#objdump: -d --prefix-addresses --show-raw-insn
+#name: MIPS CP0 branch instructions
+#as: -32
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 41000001     bc0f    [0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 02108026     xor     s0,s0,s0
+[0-9a-f]+ <[^>]*> 41010001     bc0t    [0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 02108026     xor     s0,s0,s0
+       \.\.\.
diff --git a/gas/testsuite/gas/mips/cp0b.s b/gas/testsuite/gas/mips/cp0b.s
new file mode 100644 (file)
index 0000000..ec50fc6
--- /dev/null
@@ -0,0 +1,13 @@
+       .text
+foo:
+       xor     $16, $16
+       bc0f    0f
+0:
+       xor     $16, $16
+       bc0t    0f
+0:
+       .insn
+
+# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
+       .align  4, 0
+       .space  16
diff --git a/gas/testsuite/gas/mips/cp0bl.d b/gas/testsuite/gas/mips/cp0bl.d
new file mode 100644 (file)
index 0000000..834d2d9
--- /dev/null
@@ -0,0 +1,12 @@
+#objdump: -d --prefix-addresses --show-raw-insn
+#name: MIPS CP0 branch likely instructions
+#as: -32
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 41020001     bc0fl   [0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 02108026     xor     s0,s0,s0
+[0-9a-f]+ <[^>]*> 41030001     bc0tl   [0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 02108026     xor     s0,s0,s0
+       \.\.\.
diff --git a/gas/testsuite/gas/mips/cp0bl.s b/gas/testsuite/gas/mips/cp0bl.s
new file mode 100644 (file)
index 0000000..170471b
--- /dev/null
@@ -0,0 +1,14 @@
+       .text
+       .set    noreorder
+foo:
+       bc0fl   0f
+        xor    $16, $16
+0:
+       bc0tl   0f
+        xor    $16, $16
+0:
+       .insn
+
+# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
+       .align  4, 0
+       .space  16
diff --git a/gas/testsuite/gas/mips/cp2b.d b/gas/testsuite/gas/mips/cp2b.d
new file mode 100644 (file)
index 0000000..23e1b60
--- /dev/null
@@ -0,0 +1,12 @@
+#objdump: -d --prefix-addresses --show-raw-insn
+#name: MIPS CP2 branch instructions
+#as: -32
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 49000001     bc2f    [0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 02108026     xor     s0,s0,s0
+[0-9a-f]+ <[^>]*> 49010001     bc2t    [0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 02108026     xor     s0,s0,s0
+       \.\.\.
diff --git a/gas/testsuite/gas/mips/cp2b.s b/gas/testsuite/gas/mips/cp2b.s
new file mode 100644 (file)
index 0000000..91ac582
--- /dev/null
@@ -0,0 +1,13 @@
+       .text
+foo:
+       xor     $16, $16
+       bc2f    0f
+0:
+       xor     $16, $16
+       bc2t    0f
+0:
+       .insn
+
+# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
+       .align  4, 0
+       .space  16
diff --git a/gas/testsuite/gas/mips/cp2bl.d b/gas/testsuite/gas/mips/cp2bl.d
new file mode 100644 (file)
index 0000000..d949493
--- /dev/null
@@ -0,0 +1,12 @@
+#objdump: -d --prefix-addresses --show-raw-insn
+#name: MIPS CP2 branch likely instructions
+#as: -32
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 49020001     bc2fl   [0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 02108026     xor     s0,s0,s0
+[0-9a-f]+ <[^>]*> 49030001     bc2tl   [0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 02108026     xor     s0,s0,s0
+       \.\.\.
diff --git a/gas/testsuite/gas/mips/cp2bl.s b/gas/testsuite/gas/mips/cp2bl.s
new file mode 100644 (file)
index 0000000..29d4ff5
--- /dev/null
@@ -0,0 +1,14 @@
+       .text
+       .set    noreorder
+foo:
+       bc2fl   0f
+        xor    $16, $16
+0:
+       bc2tl   0f
+        xor    $16, $16
+0:
+       .insn
+
+# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
+       .align  4, 0
+       .space  16
diff --git a/gas/testsuite/gas/mips/cp3b.d b/gas/testsuite/gas/mips/cp3b.d
new file mode 100644 (file)
index 0000000..c0b3962
--- /dev/null
@@ -0,0 +1,12 @@
+#objdump: -d --prefix-addresses --show-raw-insn
+#name: MIPS CP3 branch instructions
+#as: -32
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 4d000001     bc3f    [0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 02108026     xor     s0,s0,s0
+[0-9a-f]+ <[^>]*> 4d010001     bc3t    [0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 02108026     xor     s0,s0,s0
+       \.\.\.
diff --git a/gas/testsuite/gas/mips/cp3b.s b/gas/testsuite/gas/mips/cp3b.s
new file mode 100644 (file)
index 0000000..5b1f6e9
--- /dev/null
@@ -0,0 +1,13 @@
+       .text
+foo:
+       xor     $16, $16
+       bc3f    0f
+0:
+       xor     $16, $16
+       bc3t    0f
+0:
+       .insn
+
+# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
+       .align  4, 0
+       .space  16
diff --git a/gas/testsuite/gas/mips/cp3bl.d b/gas/testsuite/gas/mips/cp3bl.d
new file mode 100644 (file)
index 0000000..4530517
--- /dev/null
@@ -0,0 +1,12 @@
+#objdump: -d --prefix-addresses --show-raw-insn
+#name: MIPS CP3 branch likely instructions
+#as: -32
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 4d020001     bc3fl   [0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 02108026     xor     s0,s0,s0
+[0-9a-f]+ <[^>]*> 4d030001     bc3tl   [0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 02108026     xor     s0,s0,s0
+       \.\.\.
diff --git a/gas/testsuite/gas/mips/cp3bl.s b/gas/testsuite/gas/mips/cp3bl.s
new file mode 100644 (file)
index 0000000..c1664c8
--- /dev/null
@@ -0,0 +1,14 @@
+       .text
+       .set    noreorder
+foo:
+       bc3fl   0f
+        xor    $16, $16
+0:
+       bc3tl   0f
+        xor    $16, $16
+0:
+       .insn
+
+# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
+       .align  4, 0
+       .space  16
diff --git a/gas/testsuite/gas/mips/micromips@cp2b.d b/gas/testsuite/gas/mips/micromips@cp2b.d
new file mode 100644 (file)
index 0000000..b0e8496
--- /dev/null
@@ -0,0 +1,14 @@
+#objdump: -d --prefix-addresses --show-raw-insn
+#name: MIPS CP2 branch instructions
+#as: -32
+#source: cp2b.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 4280 fffe    bc2f    [0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 4440         xor     s0,s0,s0
+[0-9a-f]+ <[^>]*> 42a0 fffe    bc2t    [0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 4440         xor     s0,s0,s0
+[0-9a-f]+ <[^>]*> 0000 0000    nop
+       \.\.\.
diff --git a/gas/testsuite/gas/mips/micromips@cp2bl.d b/gas/testsuite/gas/mips/micromips@cp2bl.d
new file mode 100644 (file)
index 0000000..97d27cc
--- /dev/null
@@ -0,0 +1,18 @@
+#objdump: -d --prefix-addresses --show-raw-insn
+#name: MIPS CP2 branch likely instructions
+#as: -32
+#source: cp2bl.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 42a0 fffe    bc2t    [0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 0c00         nop
+[0-9a-f]+ <[^>]*> 9400 fffe    b       [0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 4440         xor     s0,s0,s0
+[0-9a-f]+ <[^>]*> 4280 fffe    bc2f    [0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 0c00         nop
+[0-9a-f]+ <[^>]*> 9400 fffe    b       [0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 4440         xor     s0,s0,s0
+       \.\.\.
+       \.\.\.
index 65a74dd9b67ee22e9c6ea6b0b6bbc368a8714c35..1b8c47ed8d27cf7c54110dd17c076991c9c3628b 100644 (file)
@@ -1335,6 +1335,10 @@ if { [istarget mips*-*-vxworks*] } {
 
     run_dump_test_arches "cp0c"                [mips_arch_list_matching mips1 \
                                            !mips32 !micromips]
+    run_dump_test_arches "cp0b"                [mips_arch_list_matching mips1 \
+                                           !mips4 !mips32 !micromips]
+    run_dump_test_arches "cp0bl"       [mips_arch_list_matching mips2 \
+                                           !mips4 !mips32 !micromips]
     run_dump_test_arches "cp0m"                [mips_arch_list_matching mips1 \
                                            !mips2 !micromips]
 
@@ -1358,6 +1362,10 @@ if { [istarget mips*-*-vxworks*] } {
                                            !vr5400 !r5900 !octeon]
     run_dump_test_arches "cp2-64"      [mips_arch_list_matching mips3 \
                                            !vr5400 !r5900 !octeon]
+    run_dump_test_arches "cp2b"                [mips_arch_list_matching mips1 \
+                                           !mips32r6 !vr5400 !r5900 !octeon]
+    run_dump_test_arches "cp2bl"       [mips_arch_list_matching mips2 \
+                                           !mips32r6 !vr5400 !r5900 !octeon]
     run_dump_test_arches "cp2m"                [mips_arch_list_matching mips1 \
                                            !vr5400 !r5900 !octeon]
     run_dump_test_arches "cp2d"                [mips_arch_list_matching mips2 \
@@ -1365,6 +1373,10 @@ if { [istarget mips*-*-vxworks*] } {
 
     run_dump_test_arches "cp3"         [mips_arch_list_matching mips1 \
                                            !mips3 !mips32r2 !micromips]
+    run_dump_test_arches "cp3b"                [mips_arch_list_matching mips1 \
+                                           !mips3 !mips32r2 !micromips]
+    run_dump_test_arches "cp3bl"       [mips_arch_list_matching mips2 \
+                                           !mips3 !mips32r2 !micromips]
     run_dump_test_arches "cp3m"                [mips_arch_list_matching mips1 \
                                            !mips3 !mips32 !micromips]
     run_dump_test_arches "cp3d"                [mips_arch_list_matching mips2 \