make svp64 mutually exclusive with vsx and altivec

diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 991da1f9fc0e1a4870d702d53a030cf150acbd4b..e921215653dff9a63f51a8707e928e9da81cd120 100644 (file)
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -3944,6 +3944,50 @@ rs6000_option_override_internal (bool global_init_p)
        }
     }
 
+  /* Add some warnings, errors and overriders for SVP64.  */
+  if (TARGET_SVP64)
+    {
+      const bool xsvp64 = rs6000_isa_flags_explicit & OPTION_MASK_SVP64;
+      const bool xvsx = rs6000_isa_flags_explicit & OPTION_MASK_VSX;
+      const bool xaltivec = rs6000_isa_flags_explicit & OPTION_MASK_ALTIVEC;
+      const bool vsx = TARGET_VSX;
+      const bool altivec = TARGET_ALTIVEC;
+
+      if (xsvp64)
+       {
+         if (vsx)
+           {
+             if (xvsx)
+               error ("%<-mvsx%> and %<-msvp64%> are incompatible");
+             else
+               warning (0, "%<-msvp64%> disables vsx");
+
+             rs6000_isa_flags &= ~ OPTION_MASK_VSX;
+             rs6000_isa_flags_explicit |= OPTION_MASK_VSX;
+           }
+         if (altivec)
+           {
+             if (xaltivec)
+               error ("%<-maltivec%> and %<-msvp64%> are incompatible");
+             else
+               warning (0, "%<-msvp64%> disables altivec");
+
+             rs6000_isa_flags &= ~ OPTION_MASK_ALTIVEC;
+             rs6000_isa_flags_explicit |= OPTION_MASK_ALTIVEC;
+           }
+       }
+      else
+       {
+         if (vsx)
+           warning (0, "%<-mvsx%> disables svp64");
+         if (altivec)
+           warning (0, "%<-maltivec%> disables svp64");
+
+         rs6000_isa_flags &= ~ OPTION_MASK_SVP64;
+         rs6000_isa_flags_explicit |= OPTION_MASK_SVP64;
+       }
+    }
+
   /* If hard-float/altivec/vsx were explicitly turned off then don't allow
      the -mcpu setting to enable options that conflict. */
   if ((!TARGET_HARD_FLOAT || !TARGET_ALTIVEC || !TARGET_VSX)