cris: Emit trivial btstq expected by gcc.target/cris/sync-2i.c, sync-2c.c

As the added FIXME says, the new insn_and_split generates only a
small subset of the bit-tests that can be matched by "*btst" and
that were emitted by the undecc0rated cris.md at combine-time,
but it's naturally separable from a general variant by being
just what's needed for the test-cases that were previously
xfailed, and that no additional CCmodes are required.

gcc:
	PR target/93372
	* config/cris/cris.md (zcond): New code_iterator.
	("*cbranch<mode>4_btstq<CC>"): New insn_and_split.

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 4abfbbecee2accbf286c73b56e7241622b29c7fa..915a00741d66b42d102a1d58de9ac8bcee55ed1b 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -34,6 +34,10 @@
        (cris_emit_insn): New function.
        * cris/cris-protos.h (cris_emit_insn): Declare.
 
+       PR target/93372
+       * config/cris/cris.md (zcond): New code_iterator.
+       ("*cbranch<mode>4_btstq<CC>"): New insn_and_split.
+
 2020-05-08  Vladimir Makarov  <vmakarov@redhat.com>
 
        * ira-color.c (update_costs_from_allocno): Remove

diff --git a/gcc/config/cris/cris.md b/gcc/config/cris/cris.md
index 7690d7f06587fcf35b7fd1ac98633376f6deb5a4..0b42197a9f4dae567e38ad12b083ca9cb3ced50a 100644 (file)
--- a/gcc/config/cris/cris.md
+++ b/gcc/config/cris/cris.md
@@ -178,6 +178,7 @@
 (define_code_attr shlr [(ashiftrt "ashr") (lshiftrt "lshr") (ashift "ashl")])
 (define_code_attr slr [(ashiftrt "asr") (lshiftrt "lsr") (ashift "lsl")])
 
+(define_code_iterator zcond [eq ne])
 (define_code_iterator ncond [eq ne gtu ltu geu leu])
 (define_code_iterator ocond [gt le])
 (define_code_iterator rcond [lt ge])
@@ -1934,6 +1935,32 @@
                      (pc)))]
   "")
 
+;; FIXME: this matches only a subset of what the "*btst" pattern can handle.
+(define_insn_and_split "*cbranch<mode>4_btstq<CC>"
+  [(set (pc)
+       (if_then_else
+        (zcond
+         (zero_extract:BWD
+          (match_operand:BWD 0 "register_operand" "r")
+          (match_operand 1 "const_int_operand" "Kc")
+          (const_int 0))
+         (const_int 0))
+        (label_ref (match_operand 2 ""))
+        (pc)))
+   (clobber (reg:CC CRIS_CC0_REGNUM))]
+  ""
+  "#"
+  "&& reload_completed"
+  [(set (reg:CC CRIS_CC0_REGNUM)
+       (compare:CC
+        (zero_extract:SI (match_dup 0) (match_dup 1) (const_int 0))
+        (const_int 0)))
+   (set (pc)
+       (if_then_else (zcond (reg:CC CRIS_CC0_REGNUM) (const_int 0))
+                     (label_ref (match_dup 3))
+                     (pc)))]
+  "")
+
 
 ;; We suffer from the same overflow-bit-gets-in-the-way problem as
 ;; e.g. m68k, so we have to check if overflow bit is set on all "signed"