(no commit message)

diff --git a/openpower/isa.mdwn b/openpower/isa.mdwn
index 2e1e54466ac9c2e6d37abc7bcb51f5cbc369a4f7..d1067448bd5fe2d93915c15fca8e4d979d61eb74 100644 (file)
--- a/openpower/isa.mdwn
+++ b/openpower/isa.mdwn
@@ -35,7 +35,7 @@ Scalar instructions added as part of [[sv/svp64]] development, these are
 all **DRAFT FORM** and they are all stand-alone Scalar (no hard dependency
 on Simple-V).
 Explanation of the rules for twin register targets
-(implicit RS, FRS) explained in SVPY4 [[sv/svp64/appendix]]
+(implicit RS, FRS) explained in SVP64 [[sv/svp64/appendix]]
 
 * [[isa/svfixedload]] DEPRECATED, do not use.
 * [[isa/svfixedarith]]