Removed a line jump into the CHANGELOG
authorRodrigo Alejandro Melo <rodrigomelo9@gmail.com>
Sun, 2 Feb 2020 01:48:03 +0000 (22:48 -0300)
committerRodrigo Alejandro Melo <rodrigomelo9@gmail.com>
Sun, 2 Feb 2020 01:56:01 +0000 (22:56 -0300)
Signed-off-by: Rodrigo Alejandro Melo <rodrigomelo9@gmail.com>
CHANGELOG

index 4abfeec06a11a01059d32e8dd3b8be407c9d180a..a908096e387fe9ac89adb34dbce5d081d1e2e88b 100644 (file)
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -53,13 +53,12 @@ Yosys 0.9 .. Yosys 0.9-dev
     - Added support for flip-flops with synchronous reset to synth_xilinx
     - Added support for flip-flops with reset and enable to synth_xilinx
     - Added "check -mapped"
-    - Added checking of SystemVerilog always block types (always_comb, 
-      always_latch and always_ff)
+    - Added checking of SystemVerilog always block types (always_comb, always_latch and always_ff)
     - Added "xilinx_dffopt" pass
     - Added "scratchpad" pass
     - Added "abc9 -dff"
     - Added "synth_xilinx -dff"
-    - Improved support of $readmem[hb] file inclusion which is now relative to the Verilog file
+    - Improved support of $readmem[hb] Memory Content File inclusion
 
 Yosys 0.8 .. Yosys 0.9
 ----------------------