[PR22764][LD][AARCH64]Allow R_AARCH64_ABS16 and R_AARCH64_ABS32 against absolution...

The assumption that R_AARCH64_ABS16 and R_AARCH64_ABS32 relocation in LP64 abi
will be used to generate an address does not hold for absolute symbol.
In this case, it is a value fixed at static linking time.

The condition to check the relocations is relax to allow absolute symbol and
undefined symbol case.

bfd/

2018-02-05  Renlin Li  <renlin.li@arm.com>

	PR ld/22764
	* elfnn-aarch64.c (elfNN_aarch64_check_relocs): Relax the
	R_AARCH64_ABS32 and R_AARCH64_ABS16 for absolute symbol. Apply the
	check for writeable section as well.

ld/

2018-02-05  Renlin Li  <renlin.li@arm.com>

	PR ld/22764
	* testsuite/ld-aarch64/emit-relocs-258.s: Define symbol as an address.
	* testsuite/ld-aarch64/emit-relocs-259.s: Likewise.
	* testsuite/ld-aarch64/aarch64-elf.exp: Run new test.
	* testsuite/ld-aarch64/pr22764.s: New.
	* testsuite/ld-aarch64/pr22764.d: New.

diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index e9accbdb872e1cd5bce61e1dca133ac6851d1862..f6c38443f01b75fe8eb5da65c31f10ccc5036374 100644 (file)
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,10 @@
+2018-02-05  Renlin Li  <renlin.li@arm.com>
+
+       PR ld/22764
+       * elfnn-aarch64.c (elfNN_aarch64_check_relocs): Relax the
+       R_AARCH64_ABS32 and R_AARCH64_ABS16 for absolute symbol. Apply the
+       check for writeable section as well.
+
 2018-02-05  H.J. Lu  <hongjiu.lu@intel.com>
 
        PR ld/22782

diff --git a/bfd/elfnn-aarch64.c b/bfd/elfnn-aarch64.c
index af448f98aef6fb39081d932a22951b58d8fc6515..2737773d1ccfa33c661f10b99a4937e43b46dfda 100644 (file)
--- a/bfd/elfnn-aarch64.c
+++ b/bfd/elfnn-aarch64.c
@@ -7189,10 +7189,19 @@ elfNN_aarch64_check_relocs (bfd *abfd, struct bfd_link_info *info,
 #if ARCH_SIZE == 64
        case BFD_RELOC_AARCH64_32:
 #endif
-         if (bfd_link_pic (info)
-             && (sec->flags & SEC_ALLOC) != 0
-             && (sec->flags & SEC_READONLY) != 0)
+         if (bfd_link_pic (info) && (sec->flags & SEC_ALLOC) != 0)
            {
+             if (h != NULL
+                 /* This is an absolute symbol.  It represents a value instead
+                    of an address.  */
+                 && ((h->root.type == bfd_link_hash_defined
+                      && bfd_is_abs_section (h->root.u.def.section))
+                     /* This is an undefined symbol.  */
+                     || h->root.type == bfd_link_hash_undefined))
+               break;
+
+             /* For local symbols, defined global symbols in a non-ABS section,
+                it is assumed that the value is an address.  */
              int howto_index = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
              _bfd_error_handler
                /* xgettext:c-format */

diff --git a/ld/ChangeLog b/ld/ChangeLog
index 88be8d4dec776625367829e6e0bd8c4ee2be49dd..7e9e6ddbf692fb5ffbc27561e64327056b8cf76b 100644 (file)
--- a/ld/ChangeLog
+++ b/ld/ChangeLog
@@ -1,3 +1,11 @@
+2018-02-05  Renlin Li  <renlin.li@arm.com>
+
+       PR ld/22764
+       * testsuite/ld-aarch64/emit-relocs-258.s: Define symbol as an address.
+       * testsuite/ld-aarch64/emit-relocs-259.s: Likewise.
+       * testsuite/ld-aarch64/pr22764.s: New.
+       * testsuite/ld-aarch64/pr22764.d: New.
+
 2018-02-05  H.J. Lu  <hongjiu.lu@intel.com>
 
        PR ld/22782

diff --git a/ld/testsuite/ld-aarch64/aarch64-elf.exp b/ld/testsuite/ld-aarch64/aarch64-elf.exp
index 2602a43dd90558e80c0f384abe393b7f41fd850f..c67ffb19ebfa074bdd4d203a5ef11bd0a61cb25e 100644 (file)
--- a/ld/testsuite/ld-aarch64/aarch64-elf.exp
+++ b/ld/testsuite/ld-aarch64/aarch64-elf.exp
@@ -285,6 +285,7 @@ run_dump_test "pr17415"
 run_dump_test_lp64 "tprel_g2_overflow"
 run_dump_test "tprel_add_lo12_overflow"
 run_dump_test "protected-data"
+run_dump_test_lp64 "pr22764"
 
 # ifunc tests
 run_dump_test "ifunc-1"

diff --git a/ld/testsuite/ld-aarch64/emit-relocs-258.s b/ld/testsuite/ld-aarch64/emit-relocs-258.s
index f724776243199f4a9ff94b634b0998b963f92cf6..87bb657c5d99e739f7845869c4d221e4a485497a 100644 (file)
--- a/ld/testsuite/ld-aarch64/emit-relocs-258.s
+++ b/ld/testsuite/ld-aarch64/emit-relocs-258.s
@@ -1,5 +1,6 @@
+.global dummy
 .text
-
+dummy:
   ldr x0, .L1
 
 .L1:

diff --git a/ld/testsuite/ld-aarch64/emit-relocs-259.s b/ld/testsuite/ld-aarch64/emit-relocs-259.s
index 7e1ba3ceb400b582350aa43d3c7d925ef22efd53..0977c9d869f3bfd224c439310d1f0b34073dbcd0 100644 (file)
--- a/ld/testsuite/ld-aarch64/emit-relocs-259.s
+++ b/ld/testsuite/ld-aarch64/emit-relocs-259.s
@@ -1,5 +1,6 @@
+.global dummy
 .text
-
+dummy:
   ldr x0, .L1
 
 .L1:

diff --git a/ld/testsuite/ld-aarch64/pr22764.d b/ld/testsuite/ld-aarch64/pr22764.d
new file mode 100644 (file)
index 0000000..997519f
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/pr22764.d
@@ -0,0 +1,18 @@
+#source: pr22764.s
+#ld: -shared -T relocs.ld -defsym sym_abs1=0x1 -defsym sym_abs2=0x2 -defsym sym_abs3=0x3 -e0 --emit-relocs
+#notarget: aarch64_be-*-*
+#objdump: -dr
+#...
+
+Disassembly of section \.text:
+
+0000000000010000 \<\.text\>:
+   10000:      d503201f        nop
+       ...
+                       10004: R_AARCH64_ABS64  sym_abs1
+   1000c:      00000002        \.word  0x00000002
+                       1000c: R_AARCH64_ABS32  sym_abs2
+   10010:      0003            \.short 0x0003
+                       10010: R_AARCH64_ABS16  sym_abs3
+   10012:      0000            \.short 0x0000
+   10014:      d503201f        nop

diff --git a/ld/testsuite/ld-aarch64/pr22764.s b/ld/testsuite/ld-aarch64/pr22764.s
new file mode 100644 (file)
index 0000000..25e36b4
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/pr22764.s
@@ -0,0 +1,6 @@
+  .text
+  nop
+  .xword sym_abs1
+  .word sym_abs2
+  .short sym_abs3
+  nop