/* Initialize state atoms */
ALLOC_STATE( vpt, always, R300_VPT_CMDSIZE, "vpt", 0 );
r300->hw.vpt.cmd[R300_VPT_CMD_0] = cmducs(R300_SE_VPORT_XSCALE, 6);
- ALLOC_STATE( zbs, always, R300_ZBS_CMDSIZE, "zbs", 0 );
- r300->hw.zbs.cmd[R300_ZBS_CMD_0] = cmducs(R300_SE_ZBIAS_FACTOR, 2);
ALLOC_STATE( unk2080, always, 2, "unk2080", 0 );
r300->hw.unk2080.cmd[0] = cmducs(0x2080, 1);
ALLOC_STATE( vte, always, 3, "vte", 0 );
r300->hw.unk4288.cmd[0] = cmducs(0x4288, 5);
ALLOC_STATE( unk42A0, always, 2, "unk42A0", 0 );
r300->hw.unk42A0.cmd[0] = cmducs(0x42A0, 1);
+ ALLOC_STATE( zbs, always, R300_ZBS_CMDSIZE, "zbs", 0 );
+ r300->hw.zbs.cmd[R300_ZBS_CMD_0] = cmducs(R300_RE_ZBIAS_T_FACTOR, 4);
ALLOC_STATE( unk42B4, always, 2, "unk42B4", 0 );
r300->hw.unk42B4.cmd[0] = cmducs(0x42B4, 1);
ALLOC_STATE( cul, always, R300_CUL_CMDSIZE, "cul", 0 );
r300->hw.atomlist.name = "atom-list";
insert_at_tail(&r300->hw.atomlist, &r300->hw.vpt);
- insert_at_tail(&r300->hw.atomlist, &r300->hw.zbs);
insert_at_tail(&r300->hw.atomlist, &r300->hw.unk2080);
insert_at_tail(&r300->hw.atomlist, &r300->hw.vte);
insert_at_tail(&r300->hw.atomlist, &r300->hw.unk2134);
insert_at_tail(&r300->hw.atomlist, &r300->hw.unk4274);
insert_at_tail(&r300->hw.atomlist, &r300->hw.unk4288);
insert_at_tail(&r300->hw.atomlist, &r300->hw.unk42A0);
+ insert_at_tail(&r300->hw.atomlist, &r300->hw.zbs);
insert_at_tail(&r300->hw.atomlist, &r300->hw.unk42B4);
insert_at_tail(&r300->hw.atomlist, &r300->hw.cul);
insert_at_tail(&r300->hw.atomlist, &r300->hw.unk42C0);
#define R300_VPT_ZOFFSET 6
#define R300_VPT_CMDSIZE 7
-#define R300_ZBS_CMD_0 0
-#define R300_ZBS_FACTOR 1
-#define R300_ZBS_CONSTANT 2
-#define R300_ZBS_CMDSIZE 3
-
#define R300_VIR_CMD_0 0 /* vir is variable size (at least 1) */
#define R300_VIR_CNTL_0 1
#define R300_VIR_CNTL_1 2
#define R300_PS_POINTSIZE 1
#define R300_PS_CMDSIZE 2
+#define R300_ZBS_CMD_0 0
+#define R300_ZBS_T_FACTOR 1
+#define R300_ZBS_T_CONSTANT 2
+#define R300_ZBS_W_FACTOR 3
+#define R300_ZBS_W_CONSTANT 4
+#define R300_ZBS_CMDSIZE 5
+
#define R300_CUL_CMD_0 0
#define R300_CUL_CULL 1
#define R300_CUL_CMDSIZE 2
int max_state_size; /* in dwords */
struct r300_state_atom vpt; /* viewport (1D98) */
- struct r300_state_atom zbs; /* zbias (1DB0) */
struct r300_state_atom unk2080; /* (2080) */
struct r300_state_atom vof; /* VAP output format register 0x2090 */
struct r300_state_atom vte; /* (20B0) */
struct r300_state_atom unk4260; /* (4260) */
struct r300_state_atom unk4274; /* (4274) */
struct r300_state_atom unk4288; /* (4288) */
- struct r300_state_atom unk42A0; /* (42A0) */
+ struct r300_state_atom unk42A0; /* (42A0) */
+ struct r300_state_atom zbs; /* zbias (42A4) */
struct r300_state_atom unk42B4; /* (42B4) */
struct r300_state_atom cul; /* cull cntl (42B8) */
struct r300_state_atom unk42C0; /* (42C0) */
GLuint cboffset, cbpitch;
drm_r300_cmd_header_t* cmd2;
LOCAL_VARS;
-
+
if (RADEON_DEBUG & DEBUG_IOCTL)
fprintf(stderr, "%s: %s buffer (%i,%i %ix%i)\n",
__FUNCTION__, buffer ? "back" : "front",
r300->hw.zs.cmd[R300_ZS_CNTL_0] = 0; // disable
r300->hw.zs.cmd[R300_ZS_CNTL_1] = 0;
}
-
+
/* Make sure we have enough space */
r300EnsureCmdBufSpace(r300, r300->hw.max_state_size + 9+8, __FUNCTION__);
reg_start(0x4f18,0);
e32(0x00000003);
-
+
}
int flags = 0;
int bits = 0;
int swapped;
+ uint32_t unk42B4;
+ uint32_t zbs[4];
if (RADEON_DEBUG & DEBUG_IOCTL)
fprintf(stderr, "%s: all=%d cx=%d cy=%d cw=%d ch=%d\n",
if (dPriv->numClipRects == 0)
return;
}
+
+ /* When unk42B4==0 z-bias is still on for vb mode with points ... */
+ R300_STATECHANGE(r300, zbs);
+ zbs[0]=r300->hw.zbs.cmd[R300_ZBS_T_FACTOR];
+ zbs[1]=r300->hw.zbs.cmd[R300_ZBS_T_CONSTANT];
+ zbs[2]=r300->hw.zbs.cmd[R300_ZBS_W_FACTOR];
+ zbs[3]=r300->hw.zbs.cmd[R300_ZBS_W_CONSTANT];
+
+ r300->hw.zbs.cmd[R300_ZBS_T_FACTOR] =
+ r300->hw.zbs.cmd[R300_ZBS_T_CONSTANT] =
+ r300->hw.zbs.cmd[R300_ZBS_W_FACTOR] =
+ r300->hw.zbs.cmd[R300_ZBS_W_CONSTANT] = r300PackFloat32(0.0);
+
+ /* Make sure z-bias isnt on */
+ R300_STATECHANGE(r300, unk42B4);
+ unk42B4=r300->hw.unk42B4.cmd[1];
+ r300->hw.unk42B4.cmd[1]=3;
if (mask & DD_FRONT_LEFT_BIT) {
flags |= DD_FRONT_LEFT_BIT;
* but do keep it like this for now.
*/
r300ResetHwState(r300);
+
+ R300_STATECHANGE(r300, unk42B4);
+ r300->hw.unk42B4.cmd[1]=unk42B4;
+
+ /* Put real z-bias back */
+ R300_STATECHANGE(r300, zbs);
+ r300->hw.zbs.cmd[R300_ZBS_T_FACTOR] = zbs[0];
+ r300->hw.zbs.cmd[R300_ZBS_T_CONSTANT] = zbs[1];
+ r300->hw.zbs.cmd[R300_ZBS_W_FACTOR] = zbs[2];
+ r300->hw.zbs.cmd[R300_ZBS_W_CONSTANT] = zbs[3];
+
/* r300ClearBuffer has trampled all over the hardware state.. */
r300->hw.all_dirty=GL_TRUE;
}
#define R300_SE_VPORT_ZSCALE 0x1DA8
#define R300_SE_VPORT_ZOFFSET 0x1DAC
-#define R300_SE_ZBIAS_FACTOR 0x1DB0 /* guess */
-#define R300_SE_ZBIAS_CONSTANT 0x1DB4 /* guess */
+/*
+VB mode colorbuffer clears are broken with these too so these would
+probably work also. --aet
+*/
+#define R300_SE_ZBIAS_FACTOR 0x1DB0
+#define R300_SE_ZBIAS_CONSTANT 0x1DB4
/* This register is written directly and also starts data section in many 3d CP_PACKET3's */
#define R300_VAP_VF_CNTL 0x2084
# define R300_POINTSIZE_X_SHIFT 16
# define R300_POINTSIZE_X_MASK (0xFFFF << 16) /* GUESS */
+#define R300_RE_ZBIAS_T_FACTOR 0x42A4
+#define R300_RE_ZBIAS_T_CONSTANT 0x42A8
+#define R300_RE_ZBIAS_W_FACTOR 0x42AC
+#define R300_RE_ZBIAS_W_CONSTANT 0x42B0
+
/* This register needs to be set to (1<<1) for RV350 to correctly
perform depth test (see --vb-triangles in r300_demo)
Don't know about other chips. - Vladimir
+ This is set to 3 when GL_POLYGON_OFFSET_FILL is on.
*/
#define R300_RE_OCCLUSION_CNTL 0x42B4
# define R300_OCCLUSION_ON (1<<1)
#include "r300_emit.h"
+#if 0
+/* Turns out we might not need this after all... */
+static void update_zbias(GLcontext * ctx, int prim)
+{
+ r300ContextPtr rmesa = R300_CONTEXT(ctx);
+ int enabled = 0;
+ uint32_t values[4];
+ //return ;
+ switch(prim & PRIM_MODE_MASK) {
+ case GL_POINTS:
+ if(ctx->Polygon.OffsetPoint == GL_TRUE)
+ enabled=1;
+ break;
+ case GL_LINES:
+ case GL_LINE_STRIP:
+ case GL_LINE_LOOP:
+ if(ctx->Polygon.OffsetLine == GL_TRUE)
+ enabled=1;
+ break;
+ case GL_TRIANGLES:
+ case GL_TRIANGLE_STRIP:
+ case GL_TRIANGLE_FAN:
+ case GL_QUADS:
+ case GL_QUAD_STRIP:
+ case GL_POLYGON:
+ if(ctx->Polygon.OffsetFill == GL_TRUE)
+ enabled=1;
+ break;
+ default:
+ fprintf(stderr, "%s:%s Do not know how to handle primitive %02x - help me !\n",
+ __FILE__, __FUNCTION__,
+ prim & PRIM_MODE_MASK);
+
+ }
+
+ if(enabled){
+ values[0]=values[2]=r300PackFloat32(ctx->Polygon.OffsetFactor * 12.0);
+ values[1]=values[3]=r300PackFloat32(ctx->Polygon.OffsetUnits * 4.0);
+ }else{
+ values[0]=values[2]=r300PackFloat32(0.0);
+ values[1]=values[3]=r300PackFloat32(0.0);
+ }
+
+ if(values[0] != rmesa->hw.zbs.cmd[R300_ZBS_T_FACTOR] ||
+ values[1] != rmesa->hw.zbs.cmd[R300_ZBS_T_CONSTANT] ||
+ values[2] != rmesa->hw.zbs.cmd[R300_ZBS_W_FACTOR] ||
+ values[3] != rmesa->hw.zbs.cmd[R300_ZBS_W_CONSTANT]){
+
+ R300_STATECHANGE(rmesa, zbs);
+ rmesa->hw.zbs.cmd[R300_ZBS_T_FACTOR] = values[0];
+ rmesa->hw.zbs.cmd[R300_ZBS_T_CONSTANT] = values[1];
+ rmesa->hw.zbs.cmd[R300_ZBS_W_FACTOR] = values[2];
+ rmesa->hw.zbs.cmd[R300_ZBS_W_CONSTANT] = values[3];
+
+ }
+}
+#endif
+
/**********************************************************************
* Hardware rasterization
*
#endif
if(type<0)return;
-
+
if(!VB->ObjPtr){
WARN_ONCE("FIXME: Don't know how to handle GL_ARB_vertex_buffer_object correctly\n");
return;
GLuint prim = VB->Primitive[i].mode;
GLuint start = VB->Primitive[i].start;
GLuint length = VB->Primitive[i].count;
+
r300_render_immediate_primitive(rmesa, ctx, start, start + length, prim);
}
return GL_FALSE;
}
-
/**
* Called by the pipeline manager to render a batch of primitives.
* We can return true to pass on to the next stage (i.e. software
if (RADEON_DEBUG == DEBUG_PRIMS)
fprintf(stderr, "%s\n", __FUNCTION__);
-
-
+
+
#if 1
#if 1
// I failed to figure out how dither works in hardware,
// let's just ignore it for now
//FALLBACK_IF(ctx->Color.DitherFlag);
-
+
/* I'm almost certain I forgot something here */
#if 0 /* This should work now.. */
FALLBACK_IF(ctx->Color.AlphaEnabled); // GL_ALPHA_TEST
FALLBACK_IF(ctx->Polygon.StippleFlag); // GL_POLYGON_STIPPLE
//FALLBACK_IF(ctx->Stencil.Enabled); // GL_STENCIL_TEST
FALLBACK_IF(ctx->Multisample.Enabled); // GL_MULTISAMPLE_ARB
-
+
/* One step at a time - let one texture pass.. */
for (i = 1; i < ctx->Const.MaxTextureUnits; i++)
FALLBACK_IF(ctx->Texture.Unit[i].Enabled);
case GL_CULL_FACE:
r300UpdateCulling(ctx);
break;
+
+ case GL_POLYGON_OFFSET_POINT:
+ case GL_POLYGON_OFFSET_LINE:
+ WARN_ONCE("Don't know how to enable polygon offset point/line. Help me !\n");
+ break;
+
case GL_POLYGON_OFFSET_FILL:
- WARN_ONCE("Don't know how to enable polygon offset fill. Help me !\n");
+ R300_STATECHANGE(r300, unk42B4);
+ r300->hw.unk42B4.cmd[1] = 3;
break;
case GL_VERTEX_PROGRAM_ARB:
//TCL_FALLBACK(rmesa->glCtx, R200_TCL_FALLBACK_TCL_DISABLE, state);
static void r300PolygonOffset(GLcontext * ctx, GLfloat factor, GLfloat units)
{
r300ContextPtr rmesa = R300_CONTEXT(ctx);
- GLfloat constant = units * rmesa->state.depth.scale;
-
-/* factor *= 2; */
-/* constant *= 2; */
+ GLfloat constant = units * /*rmesa->state.depth.scale*/4;
+
+ factor *= 12;
/* fprintf(stderr, "%s f:%f u:%f\n", __FUNCTION__, factor, constant); */
- WARN_ONCE("ZBIAS registers locations might not be correct\n");
-
- R200_STATECHANGE(rmesa, zbs);
- rmesa->hw.zbs.cmd[R300_ZBS_FACTOR] = r300PackFloat32(factor);
- rmesa->hw.zbs.cmd[R300_ZBS_CONSTANT] = r300PackFloat32(constant);
+ R300_STATECHANGE(rmesa, zbs);
+ rmesa->hw.zbs.cmd[R300_ZBS_T_FACTOR] = r300PackFloat32(factor);
+ rmesa->hw.zbs.cmd[R300_ZBS_T_CONSTANT] = r300PackFloat32(constant);
+ rmesa->hw.zbs.cmd[R300_ZBS_W_FACTOR] = r300PackFloat32(factor);
+ rmesa->hw.zbs.cmd[R300_ZBS_W_CONSTANT] = r300PackFloat32(constant);
}
r300->hw.unk2134.cmd[2] = 0x00000000;
#ifdef MESA_BIG_ENDIAN
r300->hw.unk2140.cmd[1] = 0x00000002;
-#elif
+#else
r300->hw.unk2140.cmd[1] = 0x00000000;
#endif
r300->hw.unk4288.cmd[5] = 0x00000000;
r300->hw.unk42A0.cmd[1] = 0x00000000;
-
- r300->hw.unk42B4.cmd[1] = 0x00000000;
+#if 0
+ r300->hw.unk42B4.cmd[1] = 0x00000000;
+#endif
+
r300->hw.unk42C0.cmd[1] = 0x4B7FFFFF;
r300->hw.unk42C0.cmd[2] = 0x00000000;