[AArch64] Extend SVE reverse permutes to predicates

This is tested by the main SVE ACLE patches, but since it affects
the evpc routines, it seemed worth splitting out.

2019-10-29  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/aarch64/aarch64-sve.md (@aarch64_sve_rev<PRED_ALL:mode>):
	New pattern.
	* config/aarch64/aarch64.c (aarch64_evpc_rev_global): Handle all
	SVE modes.

From-SVN: r277562

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index a80a8e1090c7cefaea685d38b6b26cdedbd9944c..d0c9ac2a8a01fcdcacc60d9a12689f3c10761a75 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2019-10-29  Richard Sandiford  <richard.sandiford@arm.com>
+
+       * config/aarch64/aarch64-sve.md (@aarch64_sve_rev<PRED_ALL:mode>):
+       New pattern.
+       * config/aarch64/aarch64.c (aarch64_evpc_rev_global): Handle all
+       SVE modes.
+
 2019-10-29  Richard Sandiford  <richard.sandiford@arm.com>
 
        * config/aarch64/aarch64.md (FFR_REGNUM, FFRT_REGNUM): New constants.

diff --git a/gcc/config/aarch64/aarch64-sve.md b/gcc/config/aarch64/aarch64-sve.md
index 41c8689cefd5e42295c60a571a94b0e0cf621bab..2d93d72b0de8a6686103b8ec0ecd5149e0970bbc 100644 (file)
--- a/gcc/config/aarch64/aarch64-sve.md
+++ b/gcc/config/aarch64/aarch64-sve.md
@@ -111,6 +111,7 @@
 ;; ---- [INT,FP] General permutes
 ;; ---- [INT,FP] Special-purpose unary permutes
 ;; ---- [INT,FP] Special-purpose binary permutes
+;; ---- [PRED] Special-purpose unary permutes
 ;; ---- [PRED] Special-purpose binary permutes
 ;;
 ;; == Conversions
@@ -4749,6 +4750,20 @@
   [(set_attr "movprfx" "*,yes")]
 )
 
+;; -------------------------------------------------------------------------
+;; ---- [PRED] Special-purpose unary permutes
+;; -------------------------------------------------------------------------
+;; Includes:
+;; - REV
+;; -------------------------------------------------------------------------
+
+(define_insn "@aarch64_sve_rev<mode>"
+  [(set (match_operand:PRED_ALL 0 "register_operand" "=Upa")
+       (unspec:PRED_ALL [(match_operand:PRED_ALL 1 "register_operand" "Upa")]
+                        UNSPEC_REV))]
+  "TARGET_SVE"
+  "rev\t%0.<Vetype>, %1.<Vetype>")
+
 ;; -------------------------------------------------------------------------
 ;; ---- [PRED] Special-purpose binary permutes
 ;; -------------------------------------------------------------------------

diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 466910dabce7234aa09368e593bba55ae43a148e..3b4290a9204b4b98b305a993198731c28cf6cfd8 100644 (file)
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -18156,7 +18156,7 @@ aarch64_evpc_rev_global (struct expand_vec_perm_d *d)
 {
   poly_uint64 nelt = d->perm.length ();
 
-  if (!d->one_vector_p || d->vec_flags != VEC_SVE_DATA)
+  if (!d->one_vector_p || d->vec_flags == VEC_ADVSIMD)
     return false;
 
   if (!d->perm.series_p (0, 1, nelt - 1, -1))