re PR target/18004 (ICE in output_constant_pool_2 for aligned(1) float in struct)

	PR 18004.
	* expmed.c (store_bit_field): Pass original 'value' before
	recursing.

From-SVN: r89369

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 9aca52e195b18da3cef35c7e7ba61a39dcc77c89..af5b63b1adafbe3247c4b81fdbc32c161efb23fd 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2004-10-21  Aldy Hernandez  <aldyh@redhat.com>
+
+       PR 18004.
+       * expmed.c (store_bit_field): Pass original 'value' before
+       recursing.
+
 2004-10-21  Nicolas Pitre <nico@cam.org>
 
        * config/arm/ieee754-sf.S: Large speed improvements. Fix NAN handling.

diff --git a/gcc/expmed.c b/gcc/expmed.c
index 2601361f60ea8a456c08a88b7ce454d188a98375..67224413e8a928832d38851316edb7f131b2fd79 100644 (file)
--- a/gcc/expmed.c
+++ b/gcc/expmed.c
@@ -338,6 +338,7 @@ store_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
   unsigned HOST_WIDE_INT bitpos = bitnum % unit;
   rtx op0 = str_rtx;
   int byte_offset;
+  rtx orig_value;
 
   enum machine_mode op_mode = mode_for_extraction (EP_insv, 3);
 
@@ -601,6 +602,7 @@ store_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
      corresponding size.  This can occur on a machine with 64 bit registers
      that uses SFmode for float.  This can also occur for unaligned float
      structure fields.  */
+  orig_value = value;
   if (GET_MODE_CLASS (GET_MODE (value)) != MODE_INT
       && GET_MODE_CLASS (GET_MODE (value)) != MODE_PARTIAL_INT)
     value = gen_lowpart ((GET_MODE (value) == VOIDmode
@@ -667,7 +669,7 @@ store_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
          /* Fetch that unit, store the bitfield in it, then store
             the unit.  */
          tempreg = copy_to_reg (op0);
-         store_bit_field (tempreg, bitsize, bitpos, fieldmode, value);
+         store_bit_field (tempreg, bitsize, bitpos, fieldmode, orig_value);
          emit_move_insn (op0, tempreg);
          return value;
        }