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diff --git a/openpower/sv/ldst.mdwn b/openpower/sv/ldst.mdwn
index e4889817392f38359f106bd443b98e0ac9ecfce6..59d0e8b13f249035384943a15b2c51ef8b0a35ab 100644 (file)
--- a/openpower/sv/ldst.mdwn
+++ b/openpower/sv/ldst.mdwn
@@ -118,11 +118,40 @@ an alternative table meaning for [[sv/svp64]] mode.
 
 TODO
 
+    in all cases:
+     - vector immed(RA) nonsense.
+     - unit-stride/el-stride needed on immed(RA)
+
+    modes for immed(RA) version:
+
+    * saturation
+    * predicate-result?
+    * normal
+    * fail-first
+      - vector RA is "banned"
+
+| 0-1 |  2  |  3   4  |  description              |
+| --- | --- |---------|-------------------------- |
+| 00  |   0 |  sz  dz | normal mode                      |
+| 01  | inv | CR-bit  | Rc=1: ffirst CR sel              |
+| 01  | inv | sz  RC1 |  Rc=0: ffirst z/nonz |
+| 10  |   N | sz   dz |  sat mode: N=0/1 u/s |
+| 11  | inv | CR-bit  |  Rc=1: pred-result CR sel |
+| 11  | inv | sz  RC1 |  Rc=0: pred-result z/nonz |
+
+
+    modes for RA+RB indexed version:
+
+    * saturation
+    * predicate-result
+    * normal
+    * fail-first
+      - vector RA or RB is "banned"
+
+
 | 0-1 |  2  |  3   4  |  description              |
 | --- | --- |---------|-------------------------- |
 | 00  |   0 |  sz  dz | normal mode                      |
-| 00  |   1 | sz CRM  | reduce mode (mapreduce), SUBVL=1 |
-| 00  |   1 | SVM CRM | subvector reduce mode, SUBVL>1   |
 | 01  | inv | CR-bit  | Rc=1: ffirst CR sel              |
 | 01  | inv | sz  RC1 |  Rc=0: ffirst z/nonz |
 | 10  |   N | sz   dz |  sat mode: N=0/1 u/s |