RISC-V: Raise error on unexpected ISA string at end.
authorMaxim Blinov <maxim.blinov@embecosm.com>
Wed, 31 Jul 2019 21:36:41 +0000 (21:36 +0000)
committerJim Wilson <wilson@gcc.gnu.org>
Wed, 31 Jul 2019 21:36:41 +0000 (14:36 -0700)
2019-07-31  Maxim Blinov  <maxim.blinov@embecosm.com>
gcc/
* common/config/riscv/riscv-common.c: Check -march string ends
with null.
gcc/testsuite/
* gcc.target/riscv/attribute-10.c: New test.

From-SVN: r273951

gcc/ChangeLog
gcc/common/config/riscv/riscv-common.c
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.target/riscv/attribute-10.c [new file with mode: 0644]

index 7d8339c9acfaaa7af928aa39af7f071fd84357e5..ec13629349fe6816ece822a7e837456b17f3aa3b 100644 (file)
@@ -1,3 +1,8 @@
+2019-07-31  Maxim Blinov  <maxim.blinov@embecosm.com>
+
+       * common/config/riscv/riscv-common.c: Check -march string ends
+       with null.
+
 2019-07-31  Alexander Monakov  <amonakov@ispras.ru>
 
        * ipa-devirt.c (type_warning_cmp): Make static.
index eeb75717db04c04418172cdf2f7ebb01c4c9d607..a16d6c5b44860038fd9800435e8e637f544403fd 100644 (file)
@@ -513,6 +513,13 @@ riscv_subset_list::parse (const char *arch, location_t loc)
   if (p == NULL)
     goto fail;
 
+  if (*p != '\0')
+    {
+      error_at (loc, "%<-march=%s%>: unexpected ISA string at end: %qs",
+               arch, p);
+      goto fail;
+    }
+
   return subset_list;
 
 fail:
index f490292d534678579901fc9c3cfcec96a48439c4..99f6b22f86c1a9c62ee8ac5a17f8798ea7e5c85f 100644 (file)
@@ -1,3 +1,7 @@
+2019-07-31  Maxim Blinov  <maxim.blinov@embecosm.com>
+
+       * gcc.target/riscv/attribute-10.c: New test.
+
 2019-07-31  Richard Biener  <rguenther@suse.de>
 
        PR tree-optimization/91280
diff --git a/gcc/testsuite/gcc.target/riscv/attribute-10.c b/gcc/testsuite/gcc.target/riscv/attribute-10.c
new file mode 100644 (file)
index 0000000..dd81787
--- /dev/null
@@ -0,0 +1,6 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -march=rv32im_s_sx_unexpectedstring -mabi=ilp32" } */
+int foo()
+{
+}
+/* { dg-error "unexpected ISA string at end:" "" { target { "riscv*-*-*" } } 0 } */