- (-) `_check_statement` **obs** → `Statement.wrap`
- (+) `If` **obs** → `.hdl.dsl.Module.If`
- (+) `Case` **obs** → `.hdl.dsl.Module.Switch`
- - (−) `_ArrayProxy` ?
- - (−) `Array` ?
+ - (+) `_ArrayProxy` → `.hdl.ast.ArrayProxy`, `choices=`→`elems=`, `key=`→`index=`
+ - (+) `Array` id
- (+) `ClockDomain` → `.hdl.cd.ClockDomain`
- (−) `_ClockDomainList` ?
- (−) `SPECIAL_INPUT`/`SPECIAL_OUTPUT`/`SPECIAL_INOUT` ?
from ...tools import deprecated
from ...hdl import ast
-from ...hdl.ast import DUID, Value, Signal, Mux, Cat, Repl, Const, C, ClockSignal, ResetSignal
+from ...hdl.ast import (DUID, Value, Signal, Mux, Cat, Repl, Const, C, ClockSignal, ResetSignal,
+ Array, ArrayProxy as _ArrayProxy)
from ...hdl.cd import ClockDomain
return self
-def Array(*args):
- raise NotImplementedError
-
-
(SPECIAL_INPUT, SPECIAL_OUTPUT, SPECIAL_INOUT) = range(3)
master.dat_r.eq(buses[sel].dat_r),
]
"""
- def __init__(self, iterable):
+ def __init__(self, iterable=()):
self._inner = list(iterable)
self._proxy_at = None
self._mutable = True