(extendsidi2): Use lwa_operand predicate.

(sign_extend load with update): New PowerPC64 pattern.

From-SVN: r8587

diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 0db9e1d5a66e9e6fe20ffed7ffd6f22e552fdc66..5343d3cc7098a8b62b06c2c09823ead480eab794 100644 (file)
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -422,7 +422,7 @@
 
 (define_insn ""
   [(set (match_operand:DI 0 "gpc_reg_operand" "=r,r")
-       (sign_extend:DI (match_operand:SI 1 "reg_or_mem_operand" "m,r")))]
+       (sign_extend:DI (match_operand:SI 1 "lwa_operand" "m,r")))]
   "TARGET_POWERPC64"
   "@
    lwa%U1%X1 %0,%1
@@ -4284,6 +4284,17 @@
    ldu %3,%2(%0)"
   [(set_attr "type" "load")])
 
+(define_insn ""
+  [(set (match_operand:DI 3 "gpc_reg_operand" "=r")
+       (sign_extend:DI
+        (mem:SI (plus:DI (match_operand:DI 1 "gpc_reg_operand" "0")
+                         (match_operand:DI 2 "gpc_reg_operand" "r")))))
+   (set (match_operand:DI 0 "gpc_reg_operand" "=b")
+       (plus:DI (match_dup 1) (match_dup 2)))]
+  "TARGET_POWERPC64"
+  "lwaux %3,%0,%2"
+  [(set_attr "type" "load")])
+
 (define_insn ""
   [(set (mem:DI (plus:DI (match_operand:DI 1 "gpc_reg_operand" "0,0")
                         (match_operand:DI 2 "reg_or_short_operand" "r,I")))