Fix formating

diff --git a/techlibs/efinix/arith_map.v b/techlibs/efinix/arith_map.v
index 56e1b039faf1dc4b4d30fb59ff8380ba2e897a66..178f57bc570035e526d9f62bf47c6762fdd8bf40 100644 (file)
--- a/techlibs/efinix/arith_map.v
+++ b/techlibs/efinix/arith_map.v
@@ -33,8 +33,8 @@ module _80_efinix_alu (A, B, CI, BI, X, Y, CO);
        input CI, BI;
        output [Y_WIDTH-1:0] CO;
    
-   wire CIx;
-   wire [Y_WIDTH-1:0] COx;
+    wire CIx;
+    wire [Y_WIDTH-1:0] COx;
 
        wire _TECHMAP_FAIL_ = Y_WIDTH <= 2;