genxml: Add missing INSTDONE_1 bits on Gen7.5+.

This will make aubinator_error_decode decode them properly.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

diff --git a/src/intel/genxml/gen10.xml b/src/intel/genxml/gen10.xml
index a6b8f48fda551c72aec3336db941c7650808b4fa..47c679a3fa9b478a9d4b494d1cd75669f9979325 100644 (file)
--- a/src/intel/genxml/gen10.xml
+++ b/src/intel/genxml/gen10.xml
@@ -3637,6 +3637,8 @@
     <field name="TSG Done" start="17" end="17" type="bool"/>
     <field name="GAFM Done" start="18" end="18" type="bool"/>
     <field name="GAM Done" start="19" end="19" type="bool"/>
+    <field name="RS Done" start="20" end="20" type="bool"/>
+    <field name="CS Done" start="21" end="21" type="bool"/>
     <field name="SDE Done" start="22" end="22" type="bool"/>
     <field name="RCCFBC CS Done" start="23" end="23" type="bool"/>
   </register>

diff --git a/src/intel/genxml/gen75.xml b/src/intel/genxml/gen75.xml
index e2fd856197d90f11eb1c5173e3be65a1ca95d501..be537aff0aeab893cc6ac28493fa45ad4cf1efbd 100644 (file)
--- a/src/intel/genxml/gen75.xml
+++ b/src/intel/genxml/gen75.xml
@@ -3046,6 +3046,8 @@
     <field name="TSG Done" start="17" end="17" type="bool"/>
     <field name="GAFM Done" start="18" end="18" type="bool"/>
     <field name="GAM Done" start="19" end="19" type="bool"/>
+    <field name="RS Done" start="20" end="20" type="bool"/>
+    <field name="CS Done" start="21" end="21" type="bool"/>
     <field name="SDE Done" start="22" end="22" type="bool"/>
     <field name="RCCFBC CS Done" start="23" end="23" type="bool"/>
   </register>

diff --git a/src/intel/genxml/gen8.xml b/src/intel/genxml/gen8.xml
index a89283ded6ba6d5ebe1ad5d45742a3a64854be46..c075eecc34a86ec640cf087ac2a23b0930de0486 100644 (file)
--- a/src/intel/genxml/gen8.xml
+++ b/src/intel/genxml/gen8.xml
@@ -3300,6 +3300,8 @@
     <field name="TSG Done" start="17" end="17" type="bool"/>
     <field name="GAFM Done" start="18" end="18" type="bool"/>
     <field name="GAM Done" start="19" end="19" type="bool"/>
+    <field name="RS Done" start="20" end="20" type="bool"/>
+    <field name="CS Done" start="21" end="21" type="bool"/>
     <field name="SDE Done" start="22" end="22" type="bool"/>
     <field name="RCCFBC CS Done" start="23" end="23" type="bool"/>
   </register>

diff --git a/src/intel/genxml/gen9.xml b/src/intel/genxml/gen9.xml
index f07ed748ac76123d7530e03df86e11beb8216a6c..7eef4bee0138640a05f3ee67535f0afbdf9a753e 100644 (file)
--- a/src/intel/genxml/gen9.xml
+++ b/src/intel/genxml/gen9.xml
@@ -3583,6 +3583,8 @@
     <field name="TSG Done" start="17" end="17" type="bool"/>
     <field name="GAFM Done" start="18" end="18" type="bool"/>
     <field name="GAM Done" start="19" end="19" type="bool"/>
+    <field name="RS Done" start="20" end="20" type="bool"/>
+    <field name="CS Done" start="21" end="21" type="bool"/>
     <field name="SDE Done" start="22" end="22" type="bool"/>
     <field name="RCCFBC CS Done" start="23" end="23" type="bool"/>
   </register>