ci: fix test_targets/test_simple

diff --git a/test/test_targets.py b/test/test_targets.py
index ccbba1b1ce1efb0c48d8b955a63d5fc6684448a3..06a6358223d56c3d9e9d1dc88e824a8817a5c894 100644 (file)
--- a/test/test_targets.py
+++ b/test/test_targets.py
@@ -57,7 +57,6 @@ class TestTargets(unittest.TestCase):
         self.assertEqual(errors, 0)
 
     # lattice boards
-
     def test_versa_ecp5(self):
         from litex.boards.targets.versa_ecp5 import BaseSoC
         errors = build_test([BaseSoC(**self.kwargs)])
@@ -85,7 +84,7 @@ class TestTargets(unittest.TestCase):
             "versa_ecp5"
         ]
         for p in platforms:
-            os.system("litex_simple litex.boards.platforms." + p +
+            os.system("litex/boards/targets/simple.py litex.boards.platforms." + p +
                 " --cpu-type=vexriscv " +
                 " --no-compile-software " +
                 " --no-compile-gateware " +