Fix more unrecognised GCN instructions
authorAndrew Stubbs <ams@codesourcery.com>
Mon, 9 Dec 2019 14:49:08 +0000 (14:49 +0000)
committerAndrew Stubbs <ams@gcc.gnu.org>
Mon, 9 Dec 2019 14:49:08 +0000 (14:49 +0000)
2019-12-09  Andrew Stubbs  <ams@codesourcery.com>

gcc/
* config/gcn/gcn-valu.md (gather<mode>_insn_1offset<exec>): Change
%s to %o in asm output.
(gather<mode>_insn_2offsets<exec>): Likewise.

From-SVN: r279131

gcc/ChangeLog
gcc/config/gcn/gcn-valu.md

index aec9bba15e701043f8e9eaee600449a0f81b3c27..82a1bfb6ef29e793f71fe4d42c296586a161b55b 100644 (file)
@@ -1,3 +1,9 @@
+2019-12-09  Andrew Stubbs  <ams@codesourcery.com>
+
+       * config/gcn/gcn-valu.md (gather<mode>_insn_1offset<exec>): Change
+       %s to %o in asm output.
+       (gather<mode>_insn_2offsets<exec>): Likewise.
+
 2019-12-09  Richard Earnshaw  <rearnsha@arm.com>
 
        * config/arm/t-multilib: Use arm->thumb multilib reuse rules
index 95e0731a3741d6f65e3f572eeda8df71fa75b508..16b37e8daab9a804f94714f05377ef03a5a7cd06 100644 (file)
          sprintf (buf, "flat_load%%o0\t%%0, %%1%s\;s_waitcnt\t0", glc);
       }
     else if (AS_GLOBAL_P (as))
-      sprintf (buf, "global_load%%s0\t%%0, %%1, off offset:%%2%s\;"
+      sprintf (buf, "global_load%%o0\t%%0, %%1, off offset:%%2%s\;"
               "s_waitcnt\tvmcnt(0)", glc);
     else
       gcc_unreachable ();
        /* Work around assembler bug in which a 64-bit register is expected,
        but a 32-bit value would be correct.  */
        int reg = REGNO (operands[2]) - FIRST_VGPR_REG;
-       sprintf (buf, "global_load%%s0\t%%0, v[%d:%d], %%1 offset:%%3%s\;"
+       sprintf (buf, "global_load%%o0\t%%0, v[%d:%d], %%1 offset:%%3%s\;"
                      "s_waitcnt\tvmcnt(0)", reg, reg + 1, glc);
       }
     else