sdramphy/bios: make sdrrd/sdrwr generic

diff --git a/misoclib/sdramphy/initsequence.py b/misoclib/sdramphy/initsequence.py
index a678bd644c26f0ce91830a98118ff75640a9d18a..0d2c553aee32921b1df35de169b943538641f523 100644 (file)
--- a/misoclib/sdramphy/initsequence.py
+++ b/misoclib/sdramphy/initsequence.py
@@ -3,11 +3,14 @@ from migen.fhdl.std import log2_int
 def get_sdram_phy_header(sdram_phy):
        r = "#ifndef __GENERATED_SDRAM_PHY_H\n#define __GENERATED_SDRAM_PHY_H\n"
        r += "#include <hw/common.h>\n#include <generated/csr.h>\n#include <hw/flags.h>\n\n"
+       
+       nphases = sdram_phy.phy_settings.nphases
+       r += "#define DFII_NPHASES "+str(nphases)+"\n\n"
 
        r += "static void cdelay(int i);\n"
 
        # commands_px functions
-       for n in range(sdram_phy.phy_settings.nphases):
+       for n in range(nphases):
                r += """
 static void command_p{n}(int cmd)
 {{
@@ -28,7 +31,32 @@ static void command_p{n}(int cmd)
 #define command_pwr(X) command_p{wrphase}(X)
 """.format(rdphase=str(sdram_phy.phy_settings.rdphase), wrphase=str(sdram_phy.phy_settings.wrphase)) 
        r +="\n"
-       
+
+       #
+       # sdrrd/sdrwr functions utilities
+       #
+       r += "#define DFII_PIX_WRDATA_SIZE CSR_DFII_PI0_WRDATA_SIZE\n"
+       dfii_pix_wrdata_addr = []
+       for n in range(nphases):
+               dfii_pix_wrdata_addr.append("CSR_DFII_PI{n}_WRDATA_ADDR".format(n=n))
+       r += """
+const unsigned int dfii_pix_wrdata_addr[{n}] = {{
+       {dfii_pix_wrdata_addr}
+}};
+""".format(n=nphases, dfii_pix_wrdata_addr=",\n\t".join(dfii_pix_wrdata_addr))
+       r +="\n"
+
+       r += "#define DFII_PIX_RDDATA_SIZE CSR_DFII_PI0_RDDATA_SIZE\n"
+       dfii_pix_rddata_addr = []
+       for n in range(nphases):
+               dfii_pix_rddata_addr.append("CSR_DFII_PI{n}_RDDATA_ADDR".format(n=n))
+       r += """
+const unsigned int dfii_pix_rddata_addr[{n}] = {{
+       {dfii_pix_rddata_addr}
+}};
+""".format(n=nphases, dfii_pix_rddata_addr=",\n\t".join(dfii_pix_rddata_addr))
+       r +="\n"
+
        # init sequence
        cmds = {
                "PRECHARGE_ALL" : "DFII_COMMAND_RAS|DFII_COMMAND_WE|DFII_COMMAND_CS",

diff --git a/software/bios/sdram.c b/software/bios/sdram.c
index 1f862a63c92589dda217f551427877931037b13b..61cef94da638585199ac07260aa9a764e09dc063 100644 (file)
--- a/software/bios/sdram.c
+++ b/software/bios/sdram.c
@@ -66,6 +66,7 @@ void sdrrd(char *startaddr)
        char *c;
        unsigned int addr;
        int i;
+       int p;
 
        if(*startaddr == 0) {
                printf("sdrrd <address>\n");
@@ -82,11 +83,11 @@ void sdrrd(char *startaddr)
        command_prd(DFII_COMMAND_CAS|DFII_COMMAND_CS|DFII_COMMAND_RDDATA);
        cdelay(15);
        
-       // FIXME
-       for(i=0;i<8;i++)
-               printf("%02x", MMPTR(0xe0001038+4*i));
-       for(i=0;i<8;i++)
-               printf("%02x", MMPTR(0xe000108c+4*i));
+       for(p=0;p<DFII_NPHASES;p++) {
+               for(i=0;i<DFII_PIX_RDDATA_SIZE;i++) {
+                       printf("%02x", MMPTR(dfii_pix_rddata_addr[p]+4*i));
+               }
+       }
        printf("\n");
 }
 
@@ -95,6 +96,7 @@ void sdrwr(char *startaddr)
        char *c;
        unsigned int addr;
        int i;
+       int p;
 
        if(*startaddr == 0) {
                printf("sdrrd <address>\n");
@@ -105,11 +107,11 @@ void sdrwr(char *startaddr)
                printf("incorrect address\n");
                return;
        }
-       
-       // FIXME
-       for(i=0;i<8;i++) {
-               MMPTR(0xe0001018+4*i) = i;
-               MMPTR(0xe000106c+4*i) = 0xf0 + i;
+
+       for(p=0;p<DFII_NPHASES;p++) {
+               for(i=0;i<DFII_PIX_WRDATA_SIZE;i++) {
+                       MMPTR(dfii_pix_wrdata_addr[p]+4*i) = 0x10*p + i;
+               }
        }
        
        dfii_piwr_address_write(addr);