Re: [libre-riscv-dev] LibreSOC - RISCV and POWER dual architecture feasibility

diff --git a/61/fe59cac6ffc50b55c4518e98ea2015b68de9ee b/61/fe59cac6ffc50b55c4518e98ea2015b68de9ee
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+From: "Immanuel, Yehowshua U" <yimmanuel3@gatech.edu>
+To: Libre-RISCV General Development <libre-riscv-dev@lists.libre-riscv.org>
+Thread-Topic: [libre-riscv-dev] LibreSOC - RISCV and POWER dual architecture
+ feasibility
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+Subject: Re: [libre-riscv-dev] LibreSOC - RISCV and POWER dual architecture
+ feasibility
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