radv: set max workgroup size to 128 for TES as NGG on GFX10

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>

diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c
index 9644185f870d6a39c21f04df13315abff511eca6..67630c4ee923f62e8b2b057ccbe8381e3378ff4f 100644 (file)
--- a/src/amd/vulkan/radv_nir_to_llvm.c
+++ b/src/amd/vulkan/radv_nir_to_llvm.c
@@ -3721,7 +3721,7 @@ LLVMModuleRef ac_translate_nir_to_llvm(struct ac_llvm_compiler *ac_llvm,
        }
 
        if (ctx.ac.chip_class >= GFX10) {
-               if (shaders[0]->info.stage == MESA_SHADER_VERTEX &&
+               if (is_pre_gs_stage(shaders[0]->info.stage) &&
                    options->key.vs.out.as_ngg) {
                        ctx.max_workgroup_size = 128;
                }