parser.add_option("--caches", action="store_true")
parser.add_option("--l2cache", action="store_true")
parser.add_option("--fastmem", action="store_true")
-parser.add_option("--clock", action="store", type="string", default='1GHz')
+parser.add_option("--clock", action="store", type="string", default='2GHz')
parser.add_option("--num-dirs", type="int", default=1)
parser.add_option("--num-l2caches", type="int", default=1)
parser.add_option("--num-l3caches", type="int", default=1)
assert(test_mem_mode == 'timing')
assert(FutureClass == None)
-CPUClass.clock = '1GHz'
+CPUClass.clock = options.clock
np = options.num_cpus
# Note: the L1 Cache latency is only used by the sequencer on fast path hits
#
class L1Cache(RubyCache):
- latency = 3
+ latency = 2
#
# Note: the L2 Cache latency is not currently used
#
class L2Cache(RubyCache):
- latency = 15
+ latency = 10
def define_options(parser):
parser.add_option("--l1-retries", type="int", default=1,
# Note: the L1 Cache latency is only used by the sequencer on fast path hits
#
class L1Cache(RubyCache):
- latency = 3
+ latency = 2
#
# Note: the L2 Cache latency is not currently used
#
class L2Cache(RubyCache):
- latency = 15
+ latency = 10
def define_options(parser):
return
int l1_request_latency = 2,
int l1_response_latency = 2,
int retry_threshold = 1,
- int fixed_timeout_latency = 300,
+ int fixed_timeout_latency = 100,
bool dynamic_timeout_enabled = true
{
machine(L2Cache, "Token protocol")
: CacheMemory * L2cacheMemory,
int N_tokens,
- int l2_request_latency = 10,
- int l2_response_latency = 10,
+ int l2_request_latency = 5,
+ int l2_response_latency = 5,
bool filtering_enabled = true
{
: DirectoryMemory * directory,
MemoryControl * memBuffer,
int l2_select_num_bits,
- int directory_latency = 6,
+ int directory_latency = 5,
bool distributed_persistent = true,
- int fixed_timeout_latency = 300
+ int fixed_timeout_latency = 100
{
MessageBuffer dmaResponseFromDir, network="To", virtual_network="5", ordered="true";
CacheMemory * L1IcacheMemory,
CacheMemory * L1DcacheMemory,
CacheMemory * L2cacheMemory,
- int cache_response_latency = 12,
+ int cache_response_latency = 10,
int issue_latency = 2
{
machine(Directory, "AMD Hammer-like protocol")
: DirectoryMemory * directory,
MemoryControl * memBuffer,
- int memory_controller_latency = 12
+ int memory_controller_latency = 2
{
MessageBuffer forwardFromDir, network="To", virtual_network="3", ordered="false";