x86: Set the effective base of the TSS when initializing a process.
authorGabe Black <gabe.black@gmail.com>
Sun, 13 Dec 2020 10:14:03 +0000 (02:14 -0800)
committerGabe Black <gabe.black@gmail.com>
Wed, 16 Dec 2020 06:44:36 +0000 (06:44 +0000)
For some segments, there are two base registers. One is the
architecturally visible base, and the other is the effective base used
when actually referencing memory relative to that segment. The process
initialization code was setting the architecturally visible base,
presumably because that's the value used by KVM, but was setting the
effective base to zero.

Change-Id: I06e079f24fa63f0051268437bf00c14578f62612
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38488
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
src/arch/x86/process.cc

index cdcee31e7cb1fa66ddadea7fefba129bb330fdaf..e11d563f9965fbb4054842c60dbab459f1b64e00 100644 (file)
@@ -326,7 +326,7 @@ X86_64Process::initState()
 
             tc->setMiscReg(MISCREG_TR, tssSel);
             tc->setMiscReg(MISCREG_TR_BASE, tss_base_addr);
-            tc->setMiscReg(MISCREG_TR_EFF_BASE, 0);
+            tc->setMiscReg(MISCREG_TR_EFF_BASE, tss_base_addr);
             tc->setMiscReg(MISCREG_TR_LIMIT, tss_limit);
             tc->setMiscReg(MISCREG_TR_ATTR, tss_attr);