Better error in case of nonlinear assertions while in linear logic
authorMorgan Deters <mdeters@cs.nyu.edu>
Wed, 13 Mar 2013 22:27:11 +0000 (18:27 -0400)
committerMorgan Deters <mdeters@cs.nyu.edu>
Thu, 21 Mar 2013 20:25:13 +0000 (16:25 -0400)
src/theory/arith/arith_rewriter.cpp
src/theory/arith/normal_form.cpp

index 823b61df5df684bfa90434fb7a745357c7d5c89f..ee9ff9e1bc5e8c7a7ef6926f9d23db9a3bb1d87d 100644 (file)
@@ -86,7 +86,7 @@ RewriteResponse ArithRewriter::preRewriteTerm(TNode t){
   }else if(t.isVar()){
     return rewriteVariable(t);
   }else{
-    switch(t.getKind()){
+    switch(Kind k = t.getKind()){
     case kind::MINUS:
       return rewriteMinus(t, true);
     case kind::UMINUS:
@@ -104,7 +104,7 @@ RewriteResponse ArithRewriter::preRewriteTerm(TNode t){
     case kind::INTS_MODULUS_TOTAL:
       return rewriteIntsDivModTotal(t,true);
     default:
-      Unreachable();
+      Unhandled(k);
     }
   }
 }
index fd6f04ca88e75d4837226030f43279cdb82983a2..9bd0a3b6cd7d7d7bc238474c581edf82acbf0989 100644 (file)
@@ -28,8 +28,8 @@ namespace arith {
 bool Variable::isDivMember(Node n){
   switch(n.getKind()){
   case kind::DIVISION:
-    //case kind::INTS_DIVISION:
-    //case kind::INTS_MODULUS:
+  case kind::INTS_DIVISION:
+  case kind::INTS_MODULUS:
   case kind::DIVISION_TOTAL:
   case kind::INTS_DIVISION_TOTAL:
   case kind::INTS_MODULUS_TOTAL: