* toplev.c (display_help): Ignore empty target specific
options, and if -W is also specified on the command line then
display undocumented options.
-
+
+ * config/arm/arm.c: Updated with changes in devo sources.
+ * config/arm/arm.h: Updated with changes in devo sources.
+ * config/arm/lib1funcs.asm: Updated with changes in devo sources.
+ * config/arm/lib1thumb.asm: Add ELF support.
+
Tue Oct 27 16:11:43 1998 David Edelsohn <edelsohn@mhpcc.edu>
* collect2.c (aix64_flag): New variable.
int j;
/* Tune as appropriate */
int booth_unit_size = ((tune_flags & FL_FAST_MULT) ? 8 : 2);
-
+
for (j = 0; i && j < 32; j += booth_unit_size)
{
i >>= booth_unit_size;
#ifndef STRUCTURE_SIZE_BOUNDARY
#define STRUCTURE_SIZE_BOUNDARY 32
#endif
-
+
/* Used when parsing command line option -mstructure_size_boundary. */
extern char * structure_size_string;
via the stack pointer) in functions that seem suitable.
If we have to have a frame pointer we might as well make use of it.
APCS says that the frame pointer does not need to be pushed in leaf
- functions. */
+ functions, or simple tail call functions. */
#define FRAME_POINTER_REQUIRED \
(current_function_has_nonlocal_label || (TARGET_APCS && !leaf_function_p ()))
#define ASM_OUTPUT_INTERNAL_LABEL(STREAM, PREFIX, NUM) \
do \
{ \
- char *s = (char *) alloca (40 + strlen (PREFIX)); \
+ char * s = (char *) alloca (40 + strlen (PREFIX)); \
extern int arm_target_label, arm_ccfsm_state; \
extern rtx arm_target_insn; \
\
ASM_OUTPUT_LABEL (STREAM, s); \
} while (0)
#endif
-
+
/* Output a push or a pop instruction (only used when profiling). */
#define ASM_OUTPUT_REG_PUSH(STREAM,REGNO) \
- fprintf(STREAM,"\tstmfd\t%ssp!,{%s%s}\n", \
- REGISTER_PREFIX, REGISTER_PREFIX, reg_names[REGNO])
+ fprintf (STREAM,"\tstmfd\t%ssp!,{%s%s}\n", \
+ REGISTER_PREFIX, REGISTER_PREFIX, reg_names [REGNO])
#define ASM_OUTPUT_REG_POP(STREAM,REGNO) \
- fprintf(STREAM,"\tldmfd\t%ssp!,{%s%s}\n", \
- REGISTER_PREFIX, REGISTER_PREFIX, reg_names[REGNO])
+ fprintf (STREAM,"\tldmfd\t%ssp!,{%s%s}\n", \
+ REGISTER_PREFIX, REGISTER_PREFIX, reg_names [REGNO])
/* Target characters. */
#define TARGET_BELL 007
{ \
rtx base = XEXP (X, 0); \
rtx index = XEXP (X, 1); \
- char *base_reg_name; \
+ char * base_reg_name; \
HOST_WIDE_INT offset = 0; \
if (GET_CODE (base) != REG) \
{ \
#define RETCOND
#endif
+#ifndef __USER_LABEL_PREFIX__
+#error __USER_LABEL_PREFIX__ not defined
+#endif
+
#ifdef __elf__
#define __PLT__ (PLT)
#define TYPE(x) .type SYM(x),function
#define SIZE(x)
#endif
-#ifndef __USER_LABEL_PREFIX__
-#define __USER_LABEL_PREFIX__ _
-#endif
-
/* ANSI concatenation macros. */
#define CONCAT1(a, b) CONCAT2(a, b)
pc .req r15
.text
- .globl SYM(__udivsi3)
+ .globl SYM (__udivsi3)
TYPE (__udivsi3)
.align 0
pc .req r15
.text
- .globl SYM (__umodsi3)
- TYPE (__umodsi3)
+ .globl SYM (__umodsi3)
+ TYPE (__umodsi3)
.align 0
SYM (__umodsi3):
pc .req r15
.text
- .globl SYM (__divsi3)
- TYPE (__divsi3)
+ .globl SYM (__divsi3)
+ TYPE (__divsi3)
.align 0
SYM (__divsi3):
pc .req r15
.text
- .globl SYM (__modsi3)
- TYPE (__modsi3)
+ .globl SYM (__modsi3)
+ TYPE (__modsi3)
.align 0
SYM (__modsi3):
#ifdef L_dvmd_tls
- .globl SYM (__div0)
- TYPE (__div0)
+ .globl SYM (__div0)
+ TYPE (__div0)
.align 0
SYM (__div0):
RET pc, lr
#define SIGFPE 8 @ cant use <asm/signal.h> as it
@ contains too much C rubbish
- .globl SYM (__div0)
- TYPE (__div0)
+ .globl SYM (__div0)
+ TYPE (__div0)
.align 0
SYM (__div0):
stmfd sp!, {r1, lr}
.code 16
.macro call_via register
.globl SYM (_call_via_\register)
+ TYPE (_call_via_\register)
.thumb_func
SYM (_call_via_\register):
bx \register
nop
+
+ SIZE (_call_via_\register)
.endm
call_via r0
.align 0
.code 32
+ .globl _arm_return
_arm_return:
ldmia r13!, {r12}
bx r12
.macro interwork register
.code 16
.globl SYM (_interwork_call_via_\register)
+ TYPE (_interwork_call_via_\register)
.thumb_func
SYM (_interwork_call_via_\register):
bx pc
stmeqdb r13!, {lr}
adreq lr, _arm_return
bx \register
+
+ SIZE (_interwork_call_via_\register)
.endm
interwork r0
interwork fp
interwork ip
interwork sp
- interwork lr
-
+
+ /* The lr case has to be handled a little differently...*/
+ .code 16
+ .globl SYM (_interwork_call_via_lr)
+ TYPE (_interwork_call_via_lr)
+ .thumb_func
+SYM (_interwork_call_via_lr):
+ bx pc
+ nop
+
+ .code 32
+ .globl .Lchange_lr
+.Lchange_lr:
+ tst lr, #1
+ stmeqdb r13!, {lr}
+ mov ip, lr
+ adreq lr, _arm_return
+ bx ip
+
+ SIZE (_interwork_call_via_lr)
+
#endif /* L_interwork_call_via_rX */
@ libgcc1 routines for ARM cpu.
@ Division routines, written by Richard Earnshaw, (rearnsha@armltd.co.uk)
-/* Copyright (C) 1995, 1996 Free Software Foundation, Inc.
+/* Copyright (C) 1995, 1996, 1998 Free Software Foundation, Inc.
This file is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published by the
.code 16
#ifndef __USER_LABEL_PREFIX__
-#error USER_LABEL_PREFIX not defined
+#error __USER_LABEL_PREFIX__ not defined
+#endif
+
+#ifdef __elf__
+#define __PLT__ (PLT)
+#define TYPE(x) .type SYM(x),function
+#define SIZE(x) .size SYM(x), . - SYM(x)
+#else
+#define __PLT__
+#define TYPE(x)
+#define SIZE(x)
#endif
#define RET mov pc, lr
pc .req r15
.text
- .globl SYM (__udivsi3)
- .align 0
+ .globl SYM (__udivsi3)
+ TYPE (__udivsi3)
+ .align 0
.thumb_func
SYM (__udivsi3):
cmp divisor, #0
Ldiv0:
push { lr }
- bl SYM (__div0)
+ bl SYM (__div0) __PLT__
mov r0, #0 @ about as wrong as it could be
pop { pc }
+ SIZE (__udivsi3)
+
#endif /* L_udivsi3 */
#ifdef L_umodsi3
sp .req r13
lr .req r14
pc .req r15
+
.text
- .globl SYM (__umodsi3)
- .align 0
+ .globl SYM (__umodsi3)
+ TYPE (__umodsi3)
+ .align 0
.thumb_func
SYM (__umodsi3):
cmp divisor, #0
Ldiv0:
push { lr }
- bl SYM (__div0)
+ bl SYM (__div0) __PLT__
mov r0, #0 @ about as wrong as it could be
pop { pc }
+ SIZE (__umodsi3)
+
#endif /* L_umodsi3 */
#ifdef L_divsi3
sp .req r13
lr .req r14
pc .req r15
+
.text
- .globl SYM (__divsi3)
- .align 0
+ .globl SYM (__divsi3)
+ TYPE (__divsi3)
+ .align 0
.thumb_func
SYM (__divsi3):
cmp divisor, #0
Ldiv0:
push { lr }
- bl SYM (__div0)
+ bl SYM (__div0) __PLT__
mov r0, #0 @ about as wrong as it could be
pop { pc }
+ SIZE (__divsi3)
+
#endif /* L_divsi3 */
#ifdef L_modsi3
sp .req r13
lr .req r14
pc .req r15
+
.text
- .globl SYM (__modsi3)
- .align 0
+ .globl SYM (__modsi3)
+ TYPE (__modsi3)
+ .align 0
.thumb_func
SYM (__modsi3):
mov curbit, #1
Ldiv0:
push { lr }
- bl SYM (__div0)
+ bl SYM (__div0) __PLT__
mov r0, #0 @ about as wrong as it could be
pop { pc }
+ SIZE (__modsi3)
+
#endif /* L_modsi3 */
#ifdef L_dvmd_tls
- .globl SYM (__div0)
- .align 0
+ .globl SYM (__div0)
+ TYPE (__div0)
+ .align 0
.thumb_func
SYM (__div0):
RET
+ SIZE (__div0)
+
#endif /* L_divmodsi_tools */
.macro call_via register
.globl SYM (_call_via_\register)
+ TYPE (_call_via_\register)
.thumb_func
SYM (_call_via_\register):
bx \register
nop
+
+ SIZE (_call_via_\register)
.endm
call_via r0
.align 0
.code 32
+ .globl _arm_return
_arm_return:
ldmia r13!, {r12}
bx r12
- .code 16
-
+
.macro interwork register
+ .code 16
+
.globl SYM (_interwork_call_via_\register)
+ TYPE (_interwork_call_via_\register)
.thumb_func
SYM (_interwork_call_via_\register):
bx pc
stmeqdb r13!, {lr}
adreq lr, _arm_return
bx \register
- .code 16
+
+ SIZE (_interwork_call_via_\register)
.endm
interwork r0
interwork fp
interwork ip
interwork sp
- interwork lr
-
+
+ /* The lr case has to be handled a little differently...*/
+ .code 16
+ .globl SYM (_interwork_call_via_lr)
+ TYPE (_interwork_call_via_lr)
+ .thumb_func
+SYM (_interwork_call_via_lr):
+ bx pc
+ nop
+
+ .code 32
+ .globl .Lchange_lr
+.Lchange_lr:
+ tst lr, #1
+ stmeqdb r13!, {lr}
+ mov ip, lr
+ adreq lr, _arm_return
+ bx ip
+
+ SIZE (_interwork_call_via_lr)
+
#endif /* L_interwork_call_via_rX */
--- /dev/null
+/* Definitions for 26-bit ARM running Linux-based GNU systems using ELF
+ Copyright (C) 1998 Free Software Foundation, Inc.
+ Contributed by Philip Blundell <philb@gnu.org>
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; see the file COPYING. If not, write to
+the Free Software Foundation, 59 Temple Place - Suite 330,
+Boston, MA 02111-1307, USA. */
+
+#define SUBTARGET_DEFAULT_APCS26
+
+#define SUBTARGET_LINK_SPEC \
+ " %{mapcs-32:-m elf32arm} %{!mapcs-32:-m elf32arm26}"
+
+#define SUBTARGET_EXTRA_ASM_SPEC \
+ " %{mapcs-32:-mapcs-32} %(!mapcs-32:-mapcs-26}"
+
+#define TARGET_DEFAULT (ARM_FLAG_SHORT_BYTE)
+
+#include "arm/linux-elf.h"
projects / gcc.git / commitdiff