ia64.md (mulhi3): Fix typo last change.

        * config/ia64/ia64.md (mulhi3): Fix typo last change.
        * config/ia64/lib1func.asm (__divdi3, __udivdi3, __umodsi3): Likewise.

From-SVN: r36174

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 92bbf3f84f0e8f57ac2f20bf4ecfa41bb75355b8..fd6e3b81e5b28d5029d79c84d71e596c97eac3e4 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2000-09-05  Richard Henderson  <rth@cygnus.com>
+
+       * config/ia64/ia64.md (mulhi3): Fix typo last change.
+       * config/ia64/lib1func.asm (__divdi3, __udivdi3, __umodsi3): Likewise.
+
 2000-09-03  Donn Terry  <donn@interix.com>,  Laurynas Biveinis  <lauras@softhome.net>
 
        * Makefile.in: Restructure bootstrap stages to allow clean

diff --git a/gcc/config/ia64/ia64.md b/gcc/config/ia64/ia64.md
index 68fbbefec44f5dbadf2c0056c8174b2b7c424c7a..129ce240316a8b66c853cd61b329179917218f2e 100644 (file)
--- a/gcc/config/ia64/ia64.md
+++ b/gcc/config/ia64/ia64.md
@@ -1328,7 +1328,7 @@
        (mult:HI (match_operand:HI 1 "gr_register_operand" "r")
                 (match_operand:HI 2 "gr_register_operand" "r")))]
   ""
-  "pmpy.r %0 = %1, %2"
+  "pmpy2.r %0 = %1, %2"
   [(set_attr "type" "I")])
 
 \f

diff --git a/gcc/config/ia64/lib1funcs.asm b/gcc/config/ia64/lib1funcs.asm
index 010147ea69a993ede9c807ac9efe05757f8900df..44f30fd2cbf763b368ba5b9000e12454e48fd973 100644 (file)
--- a/gcc/config/ia64/lib1funcs.asm
+++ b/gcc/config/ia64/lib1funcs.asm
@@ -137,6 +137,7 @@ __divdi3:
        ;;
        // Compute the reciprocal approximation.
        frcpa.s1 f10, p6 = f8, f9
+       ;;
        // 3 Newton-Raphson iterations.
 (p6)   fnma.s1 f11 = f9, f10, f1
 (p6)   fmpy.s1 f12 = f8, f10
@@ -254,7 +255,7 @@ __udivdi3:
 (p6)   fma.s1 f10 = f13, f10, f10
 (p6)   fnma.s1 f12 = f9, f11, f8
        ;;
-(p6)   fma.s1 f10 = f2, f10, f11
+(p6)   fma.s1 f10 = f12, f10, f11
        ;;
        // Round quotient to an unsigned integer.
        fcvt.fxu.trunc.s1 f10 = f10
@@ -482,6 +483,7 @@ __umodsi3:
 (p6)   fmpy.s1 f12 = f8, f10
 (p6)   fnma.s1 f10 = f9, f10, f1
        ;;
+       setf.sig f9 = in1
 (p6)   fma.s1 f12 = f10, f12, f12
 (p6)   fma.s1 f10 = f10, f10, f11
        ;;