bios: allow testing main_ram at init when using an external controller

diff --git a/litex/soc/software/bios/main.c b/litex/soc/software/bios/main.c
index 6ec19b515b32c359de2c17d0186b0a78bc19c6b8..89a3b9cce149fcc07be981e32c5b9e37d69f6202 100644 (file)
--- a/litex/soc/software/bios/main.c
+++ b/litex/soc/software/bios/main.c
@@ -540,8 +540,12 @@ int main(int i, char **c)
 #endif
 #ifdef CSR_SDRAM_BASE
        sdr_ok = sdrinit();
+#else
+#ifdef MAIN_RAM_TEST
+       sdr_ok = memtest();
 #else
        sdr_ok = 1;
+#endif
 #endif
        if(sdr_ok)
                boot_sequence();

diff --git a/litex/soc/software/bios/sdram.c b/litex/soc/software/bios/sdram.c
index 17474c1ac79de2fe3484e4411199e1a8d5ba5533..291efc835cd38c89bf451b698c2b5d31359b4502 100644 (file)
--- a/litex/soc/software/bios/sdram.c
+++ b/litex/soc/software/bios/sdram.c
@@ -1,10 +1,11 @@
 #include <generated/csr.h>
-#ifdef CSR_SDRAM_BASE
 
 #include <stdio.h>
 #include <stdlib.h>
 
+#ifdef CSR_SDRAM_BASE
 #include <generated/sdram_phy.h>
+#endif
 #include <generated/mem.h>
 #include <hw/flags.h>
 #include <system.h>
@@ -31,6 +32,8 @@ static void cdelay(int i)
        }
 }
 
+#ifdef CSR_SDRAM_BASE
+
 void sdrsw(void)
 {
        sdram_dfii_control_write(DFII_CONTROL_CKE|DFII_CONTROL_ODT|DFII_CONTROL_RESET_N);
@@ -509,6 +512,8 @@ static void read_level(int module)
 }
 #endif /* CSR_DDRPHY_BASE */
 
+#endif /* CSR_SDRAM_BASE */
+
 static unsigned int seed_to_data_32(unsigned int seed, int random)
 {
        if (random)
@@ -676,6 +681,8 @@ int memtest(void)
        }
 }
 
+#ifdef CSR_SDRAM_BASE
+
 #ifdef CSR_DDRPHY_BASE
 int sdrlevel(void)
 {