* <https://github.com/ucb-bar/chisel-tutorial> A brief Chisel tutorial
* <https://github.com/xfguo/tbgen/blob/master/tbgen.py> auto-generated test module for verilog
* <https://github.com/kdurant/verilog-testbench> described here <https://www.vim.org/scripts/script.php?script_id=4596>
+* <http://agilesoc.com/open-source-projects/svunit/> - SVunit - unit testing for verilog
# Pinouts Specification