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radv: apply the tess+GS hang workaround to Polaris12 as well
authorDave Airlie <airlied@redhat.com>
Sat, 6 May 2017 20:14:11 +0000 (21:14 +0100)
committerDave Airlie <airlied@redhat.com>
Sun, 7 May 2017 10:17:48 +0000 (11:17 +0100)
As I pointed out for radeonsi, and AMD confirmed, so fix this
in radv as well.

Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
src/amd/vulkan/si_cmd_buffer.c patch | blob | history

diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c
index 1382272d71b01467c6d5eb7c7eaac4d64c23d940..d94e23b975f2e38c5f74db2fcec5ebe48ca3478c 100644 (file)
--- a/src/amd/vulkan/si_cmd_buffer.c
+++ b/src/amd/vulkan/si_cmd_buffer.c
@@ -672,7 +672,8 @@ si_get_ia_multi_vgt_param(struct radv_cmd_buffer *cmd_buffer,
                                if (family == CHIP_TONGA ||
                                    family == CHIP_FIJI ||
                                    family == CHIP_POLARIS10 ||
-                                   family == CHIP_POLARIS11)
+                                   family == CHIP_POLARIS11 ||
+                                   family == CHIP_POLARIS12)
                                        partial_vs_wave = true;
                        } else {
                                partial_vs_wave = true;