radeonsi: improve HiZ precision for less and lequal depth functions

r600g needs this too.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index 8e0880419bc24f8326460d06b0318e8c265d1dae..c1107c66001773ae2b4f4950a34ea17f4fb6f6c2 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -1815,7 +1815,13 @@ static void si_db(struct r600_context *rctx, struct si_pm4_state *pm4,
        /* use htile only for first level */
        if (rtex->htile_buffer && !level) {
                z_info |= S_028040_TILE_SURFACE_ENABLE(1);
-               /* Force off means no force, DB_SHADER_CONTROL decides */
+
+               /* This is optimal for the clear value of 1.0 and using
+                * the LESS and LEQUAL test functions. Set this to 0
+                * for the opposite case. This can only be changed when
+                * clearing. */
+               z_info |= S_028040_ZRANGE_PRECISION(1);
+
                uint64_t va = r600_resource_va(&rctx->screen->b.b, &rtex->htile_buffer->b.b);
                db_htile_data_base = va >> 8;
                db_htile_surface = S_028ABC_FULL_CACHE(1);