Arithmetic/Logical, Condition Register operations, and Branch-Conditional.
Anything not falling into those five categories is termed "UnVectoriseable".
-**Definition of Vertical-First:**
+**Definition of Horizontal-First:**
Normal Cray-style Vectorisation, designated Horizontal-First, performs
element-level operations (often in parallel) before moving in the usual
-fashion to the next instruction. Vertical-First on the other hand executes
+fashion to the next instruction. The term "Horizontal-First"
+stems from visually listing program instructions vertically and register
+files horizontally, whereupon it is clear that register-elements are
+prioritised.
+
+**Definition of Vertical-First:**
+
+Vertical-First executes
*one element operation only* then moves on to the next instruction,
whereupon if that is also an SVP64-Prefixed instruction the exact same
element offset is used. Element offsets are then explicitly advanced
by calling a special instruction, `svstep`. The term "Vertical-First"
stems from visually listing program instructions vertically and register
-files horizontally.
+files horizontally, where moving to the next instruction is a clear priority.
**Definition of SVP64Single Prefixing:**