Add peepopt_dffmuxext

diff --git a/passes/pmgen/Makefile.inc b/passes/pmgen/Makefile.inc
index 4989c582ac518b90522c0b079b9013582fa40577..6648e2ec05e4f8aed8713918f2603fc03ff87397 100644 (file)
--- a/passes/pmgen/Makefile.inc
+++ b/passes/pmgen/Makefile.inc
@@ -27,6 +27,7 @@ $(eval $(call add_extra_objs,passes/pmgen/peepopt_pm.h))
 
 PEEPOPT_PATTERN  = passes/pmgen/peepopt_shiftmul.pmg
 PEEPOPT_PATTERN += passes/pmgen/peepopt_muldiv.pmg
+PEEPOPT_PATTERN += passes/pmgen/peepopt_dffmuxext.pmg
 
 passes/pmgen/peepopt_pm.h: passes/pmgen/pmgen.py $(PEEPOPT_PATTERN)
        $(P) mkdir -p passes/pmgen && python3 $< -o $@ -p peepopt $(filter-out $<,$^)

diff --git a/passes/pmgen/peepopt.cc b/passes/pmgen/peepopt.cc
index e7f95cf8574d75e35883a445f53fd619eb11e866..b57d26cef317cbabb704b1709a9fa9ec89e683c0 100644 (file)
--- a/passes/pmgen/peepopt.cc
+++ b/passes/pmgen/peepopt.cc
@@ -60,6 +60,7 @@ struct PeepoptPass : public Pass {
                                peepopt_pm pm(module, module->selected_cells());
                                pm.run_shiftmul();
                                pm.run_muldiv();
+                               pm.run_dffmuxext();
                        }
                }
        }

diff --git a/passes/pmgen/peepopt_dffmuxext.pmg b/passes/pmgen/peepopt_dffmuxext.pmg
new file mode 100644 (file)
index 0000000..e99ce16
--- /dev/null
+++ b/passes/pmgen/peepopt_dffmuxext.pmg
@@ -0,0 +1,58 @@
+pattern dffmuxext
+
+state <IdString> muxAB
+
+match dff
+       select dff->type == $dff
+       select GetSize(port(dff, \D)) > 1
+endmatch
+
+match mux
+       select mux->type == $mux
+       select GetSize(port(mux, \Y)) > 1
+       choice <IdString> AB {\A, \B}
+       //select port(mux, AB)[GetSize(port(mux, \Y))-1].wire
+       index <SigSpec> port(mux, \Y) === port(dff, \D)
+       define <IdString> BA (AB == \A ? \B : \A)
+       index <SigSpec> port(mux, BA) === port(dff, \Q)
+       filter port(mux, AB)[GetSize(port(mux, \Y))-1] == port(mux, AB)[GetSize(port(mux, \Y))-2]
+       set muxAB AB
+endmatch
+
+code
+       did_something = true;
+
+       log_cell(dff);
+       log_cell(mux);
+
+       SigSpec &D = mux->connections_.at(muxAB);
+       SigSpec &Q = dff->connections_.at(\Q);
+       int width = GetSize(D);
+
+       SigBit sign = D[width-1];
+       bool is_signed = sign.wire;
+       int i;
+       for (i = width-1; i >= 2; i--) {
+               if (!is_signed) {
+                       module->connect(Q[i], sign);
+                       if (D[i-1] != sign)
+                               break;
+               }
+               else {
+                       module->connect(Q[i], Q[i-1]);
+                       if (D[i-2] != sign)
+                               break;
+               }
+       }
+
+       mux->connections_.at(\A).remove(i, width-i);
+       mux->connections_.at(\B).remove(i, width-i);
+       mux->connections_.at(\Y).remove(i, width-i);
+       mux->fixup_parameters();
+       dff->connections_.at(\D).remove(i, width-i);
+       dff->connections_.at(\Q).remove(i, width-i);
+       dff->fixup_parameters();
+
+       log("dffmuxext pattern in %s: dff=%s, mux=%s; removed top %d bits.\n", log_id(module), log_id(dff), log_id(mux), width-i);
+       accept;
+endcode